| /drivers/pci/controller/ |
| D | pci-v3-semi.c | 599 u32 *pci_base, u32 *pci_map) in v3_get_dma_range_config() argument
613 *pci_base = val; in v3_get_dma_range_config()
670 *pci_base, *pci_map); in v3_get_dma_range_config()
685 u32 pci_base, pci_map; in v3_pci_parse_map_dma_ranges() local
687 ret = v3_get_dma_range_config(v3, entry, &pci_base, &pci_map); in v3_pci_parse_map_dma_ranges()
692 writel(pci_base, v3->base + V3_PCI_BASE0); in v3_pci_parse_map_dma_ranges()
695 writel(pci_base, v3->base + V3_PCI_BASE1); in v3_pci_parse_map_dma_ranges()
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| /drivers/vme/bridges/ |
| D | vme_ca91cx42.c | 335 dma_addr_t pci_base, u32 aspace, u32 cycle) in ca91cx42_slave_set() argument
380 pci_offset = pci_base - vme_base; in ca91cx42_slave_set()
441 dma_addr_t *pci_base, u32 *aspace, u32 *cycle) in ca91cx42_slave_get() argument
463 *pci_base = (dma_addr_t)*vme_base + pci_offset; in ca91cx42_slave_get()
596 unsigned long long pci_bound, vme_offset, pci_base; in ca91cx42_master_set() local
640 pci_base = (unsigned long long)image->bus_resource.start; in ca91cx42_master_set()
646 pci_bound = pci_base + size; in ca91cx42_master_set()
647 vme_offset = vme_base - pci_base; in ca91cx42_master_set()
723 iowrite32(pci_base, bridge->base + CA91CX42_LSI_BS[i]); in ca91cx42_master_set()
751 unsigned long long pci_base, pci_bound, vme_offset; in __ca91cx42_master_get() local
[all …]
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| D | vme_tsi148.c | 473 dma_addr_t pci_base, u32 aspace, u32 cycle) in tsi148_slave_set() argument
520 pci_offset = (unsigned long long)pci_base - vme_base; in tsi148_slave_set()
617 dma_addr_t *pci_base, u32 *aspace, u32 *cycle) in tsi148_slave_get() argument
652 *pci_base = (dma_addr_t)(*vme_base + pci_offset); in tsi148_slave_get()
816 unsigned long long pci_bound, vme_offset, pci_base; in tsi148_master_set() local
858 pci_base = 0; in tsi148_master_set()
864 pci_base = region.start; in tsi148_master_set()
870 pci_bound = pci_base + (size - 0x10000); in tsi148_master_set()
871 vme_offset = vme_base - pci_base; in tsi148_master_set()
875 reg_split(pci_base, &pci_base_high, &pci_base_low); in tsi148_master_set()
[all …]
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| /drivers/net/ethernet/qlogic/qlcnic/ |
| D | qlcnic_init.c | 270 u32 base_addr, offset, pci_base; in qlcnic_decode_crb_addr() local
274 pci_base = QLCNIC_ADDR_ERROR; in qlcnic_decode_crb_addr()
280 pci_base = i << 20; in qlcnic_decode_crb_addr()
284 if (pci_base == QLCNIC_ADDR_ERROR) in qlcnic_decode_crb_addr()
285 return pci_base; in qlcnic_decode_crb_addr()
287 return pci_base + offset; in qlcnic_decode_crb_addr()
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| /drivers/net/ethernet/qlogic/netxen/ |
| D | netxen_nic_init.c | 302 u32 base_addr, offset, pci_base; in netxen_decode_crb_addr() local
306 pci_base = NETXEN_ADDR_ERROR; in netxen_decode_crb_addr()
312 pci_base = i << 20; in netxen_decode_crb_addr()
316 if (pci_base == NETXEN_ADDR_ERROR) in netxen_decode_crb_addr()
317 return pci_base; in netxen_decode_crb_addr()
319 return pci_base + offset; in netxen_decode_crb_addr()
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| /drivers/scsi/ |
| D | mvumi.h | 476 u32 pci_base[MAX_BASE_ADDRESS]; member
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| D | mvumi.c | 636 &mhba->pci_base[i]); in mvumi_backup_bar_addr()
645 if (mhba->pci_base[i]) in mvumi_restore_bar_addr()
647 mhba->pci_base[i]); in mvumi_restore_bar_addr()
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| /drivers/scsi/qla4xxx/ |
| D | ql4_nx.c | 850 unsigned long base_addr, offset, pci_base; in qla4_82xx_decode_crb_addr() local
855 pci_base = ADDR_ERROR; in qla4_82xx_decode_crb_addr()
861 pci_base = i << 20; in qla4_82xx_decode_crb_addr()
865 if (pci_base == ADDR_ERROR) in qla4_82xx_decode_crb_addr()
866 return pci_base; in qla4_82xx_decode_crb_addr()
868 return pci_base + offset; in qla4_82xx_decode_crb_addr()
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| /drivers/scsi/qla2xxx/ |
| D | qla_nx.c | 793 unsigned long base_addr, offset, pci_base; in qla82xx_decode_crb_addr() local
798 pci_base = ADDR_ERROR; in qla82xx_decode_crb_addr()
804 pci_base = i << 20; in qla82xx_decode_crb_addr()
808 if (pci_base == ADDR_ERROR) in qla82xx_decode_crb_addr()
809 return pci_base; in qla82xx_decode_crb_addr()
810 return pci_base + offset; in qla82xx_decode_crb_addr()
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| /drivers/net/ethernet/chelsio/cxgb4/ |
| D | t4_hw.c | 772 static u32 t4_get_window(struct adapter *adap, u32 pci_base, u64 pci_mask, in t4_get_window() argument
789 bar0 = t4_read_pcie_cfg4(adap, pci_base); in t4_get_window()
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