| /drivers/iommu/ |
| D | omap-iommu.h | 24 u32 pgsz, prsvd, valid; member
194 #define get_cam_va_mask(pgsz) \ argument
195 (((pgsz) == MMU_CAM_PGSZ_16M) ? 0xff000000 : \
196 ((pgsz) == MMU_CAM_PGSZ_1M) ? 0xfff00000 : \
197 ((pgsz) == MMU_CAM_PGSZ_64K) ? 0xffff0000 : \
198 ((pgsz) == MMU_CAM_PGSZ_4K) ? 0xfffff000 : 0)
|
| D | omap-iommu.c | 226 attr <<= (((e->pgsz == MMU_CAM_PGSZ_4K) || in get_iopte_attr()
227 (e->pgsz == MMU_CAM_PGSZ_64K)) ? 0 : 6); in get_iopte_attr()
308 if (e->da & ~(get_cam_va_mask(e->pgsz))) { in iotlb_alloc_cr()
318 cr->cam = (e->da & MMU_CAM_VATAG_MASK) | e->prsvd | e->pgsz | e->valid; in iotlb_alloc_cr()
630 switch (e->pgsz) { in iopgtable_store_entry_core()
1306 static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa, int pgsz) in iotlb_init_entry() argument
1313 e->pgsz = pgsz; in iotlb_init_entry()
1318 return iopgsz_to_bytes(e->pgsz); in iotlb_init_entry()
|
| /drivers/infiniband/hw/bnxt_re/ |
| D | qplib_rcfw.c | 483 u8 pgsz, lvl; in bnxt_qplib_init_rcfw() local
505 pgsz = bnxt_qplib_base_pg_size(&ctx->qpc_tbl); in bnxt_qplib_init_rcfw()
506 req.qpc_pg_size_qpc_lvl = (pgsz << CMDQ_INITIALIZE_FW_QPC_PG_SIZE_SFT) | in bnxt_qplib_init_rcfw()
509 pgsz = bnxt_qplib_base_pg_size(&ctx->mrw_tbl); in bnxt_qplib_init_rcfw()
510 req.mrw_pg_size_mrw_lvl = (pgsz << CMDQ_INITIALIZE_FW_QPC_PG_SIZE_SFT) | in bnxt_qplib_init_rcfw()
513 pgsz = bnxt_qplib_base_pg_size(&ctx->srqc_tbl); in bnxt_qplib_init_rcfw()
514 req.srq_pg_size_srq_lvl = (pgsz << CMDQ_INITIALIZE_FW_QPC_PG_SIZE_SFT) | in bnxt_qplib_init_rcfw()
517 pgsz = bnxt_qplib_base_pg_size(&ctx->cq_tbl); in bnxt_qplib_init_rcfw()
518 req.cq_pg_size_cq_lvl = (pgsz << CMDQ_INITIALIZE_FW_QPC_PG_SIZE_SFT) | in bnxt_qplib_init_rcfw()
521 pgsz = bnxt_qplib_base_pg_size(&ctx->tim_tbl); in bnxt_qplib_init_rcfw()
[all …]
|
| /drivers/pci/ |
| D | iov.c | 704 u32 pgsz; in sriov_init() local
732 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); in sriov_init()
734 pgsz &= ~((1 << i) - 1); in sriov_init()
735 if (!pgsz) in sriov_init()
738 pgsz &= ~(pgsz - 1); in sriov_init()
739 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); in sriov_init()
777 iov->pgsz = pgsz; in sriov_init()
843 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); in sriov_restore_state()
|
| D | pci.h | 345 u32 pgsz; /* Page size for BAR alignment */ member
|
| /drivers/mtd/nand/raw/ |
| D | nandsim.c | 202 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
316 uint pgsz; /* NAND flash page size, bytes */ member
653 ns->geom.pgsz = mtd->writesize; in ns_init()
656 ns->geom.pgszoob = ns->geom.pgsz + ns->geom.oobsz; in ns_init()
657 ns->geom.pgnum = div_u64(ns->geom.totsz, ns->geom.pgsz); in ns_init()
661 ns->geom.pgsec = ns->geom.secsz / ns->geom.pgsz; in ns_init()
665 if (ns->geom.pgsz == 512) { in ns_init()
669 } else if (ns->geom.pgsz == 2048) { in ns_init()
671 } else if (ns->geom.pgsz == 4096) { in ns_init()
674 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz); in ns_init()
[all …]
|
| /drivers/net/ethernet/chelsio/libcxgb/ |
| D | libcxgb_ppm.c | 65 int cxgbi_ppm_find_page_index(struct cxgbi_ppm *ppm, unsigned long pgsz) in cxgbi_ppm_find_page_index() argument
71 if (pgsz == 1UL << (DDP_PGSZ_BASE_SHIFT + in cxgbi_ppm_find_page_index()
74 __func__, ppm->ndev->name, pgsz, i); in cxgbi_ppm_find_page_index()
78 pr_info("ippm: ddp page size %lu not supported.\n", pgsz); in cxgbi_ppm_find_page_index()
|
| D | libcxgb_ppm.h | 317 int cxgbi_ppm_find_page_index(struct cxgbi_ppm *ppm, unsigned long pgsz);
|
| /drivers/net/ethernet/qlogic/qed/ |
| D | qed_sriov.h | 100 u32 pgsz; /* page size for BAR alignment */ member
|
| D | qed_sriov.c | 369 pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz); in qed_iov_pci_cfg_info()
383 iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz); in qed_iov_pci_cfg_info()
|
| /drivers/scsi/mpi3mr/ |
| D | mpi3mr.h | 396 u8 pgsz; member
|
| D | mpi3mr_os.c | 748 ((1 << tgtdev->dev_spec.pcie_inf.pgsz) - 1)); in mpi3mr_update_sdev()
861 tgtdev->dev_spec.pcie_inf.pgsz = 12; in mpi3mr_update_tgtdev()
865 tgtdev->dev_spec.pcie_inf.pgsz = pcieinf->page_size; in mpi3mr_update_tgtdev()
3203 ((1 << tgt_dev->dev_spec.pcie_inf.pgsz) - 1)); in mpi3mr_slave_configure()
|
| /drivers/hwtracing/intel_th/ |
| D | msu.c | 1417 size_t pgsz = PFN_DOWN(sg->length); in msc_buffer_get_page() local
1419 if (pgoff < pgsz) in msc_buffer_get_page()
1422 pgoff -= pgsz; in msc_buffer_get_page()
|
| /drivers/net/ethernet/broadcom/bnx2x/ |
| D | bnx2x_sriov.h | 56 u32 pgsz; /* page size for BAR alignment */ member
|
| D | bnx2x_sriov.c | 1133 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz); in bnx2x_sriov_pci_cfg_info()
1163 iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz); in bnx2x_sriov_info()
|
| /drivers/infiniband/core/ |
| D | verbs.c | 2956 unsigned long pgsz) in __rdma_block_iter_start() argument
2963 biter->__pg_bit = __fls(pgsz); in __rdma_block_iter_start()
|