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Searched refs:pixel_format (Results 1 – 25 of 133) sorted by relevance

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/drivers/gpu/drm/selftests/
Dtest-drm_framebuffer.c30 .cmd = { .width = 600, .height = 600, .pixel_format = DRM_FORMAT_ABGR8888,
35 .cmd = { .width = MAX_WIDTH, .height = MAX_HEIGHT, .pixel_format = DRM_FORMAT_ABGR8888,
40 .cmd = { .width = MAX_WIDTH, .height = MAX_HEIGHT, .pixel_format = DRM_FORMAT_ABGR8888,
45 .cmd = { .width = MAX_WIDTH, .height = MAX_HEIGHT, .pixel_format = DRM_FORMAT_ABGR8888,
50 .cmd = { .width = MAX_WIDTH + 1, .height = MAX_HEIGHT, .pixel_format = DRM_FORMAT_ABGR8888,
55 .cmd = { .width = MAX_WIDTH, .height = MAX_HEIGHT, .pixel_format = DRM_FORMAT_ABGR8888,
60 .cmd = { .width = MAX_WIDTH, .height = MAX_HEIGHT, .pixel_format = 0,
65 .cmd = { .width = 0, .height = MAX_HEIGHT, .pixel_format = DRM_FORMAT_ABGR8888,
70 .cmd = { .width = MAX_WIDTH, .height = 0, .pixel_format = DRM_FORMAT_ABGR8888,
75 .cmd = { .width = MAX_WIDTH, .height = MAX_HEIGHT, .pixel_format = DRM_FORMAT_ABGR8888,
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/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dpp.c104 uint32_t pixel_format = 0; in dpp2_cnv_setup() local
129 pixel_format = 1; in dpp2_cnv_setup()
132 pixel_format = 3; in dpp2_cnv_setup()
137 pixel_format = 8; in dpp2_cnv_setup()
141 pixel_format = 10; in dpp2_cnv_setup()
146 pixel_format = 65; in dpp2_cnv_setup()
152 pixel_format = 64; in dpp2_cnv_setup()
158 pixel_format = 67; in dpp2_cnv_setup()
164 pixel_format = 66; in dpp2_cnv_setup()
170 pixel_format = 26; /* ARGB16161616_UNORM */ in dpp2_cnv_setup()
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Ddcn20_dsc.c367 …dsc_reg_vals->pixel_format = dsc_dc_pixel_encoding_to_dsc_pixel_format(dsc_cfg->pixel_encoding, ds… in dsc_prepare_config()
391 …if (dsc_reg_vals->pixel_format == DSC_PIXFMT_NATIVE_YCBCR420 || dsc_reg_vals->pixel_format == DSC_… in dsc_prepare_config()
396 dsc_reg_vals->pps.convert_rgb = dsc_reg_vals->pixel_format == DSC_PIXFMT_RGB ? 1 : 0; in dsc_prepare_config()
397 dsc_reg_vals->pps.native_422 = (dsc_reg_vals->pixel_format == DSC_PIXFMT_NATIVE_YCBCR422); in dsc_prepare_config()
398 dsc_reg_vals->pps.native_420 = (dsc_reg_vals->pixel_format == DSC_PIXFMT_NATIVE_YCBCR420); in dsc_prepare_config()
399 dsc_reg_vals->pps.simple_422 = (dsc_reg_vals->pixel_format == DSC_PIXFMT_SIMPLE_YCBCR422); in dsc_prepare_config()
410 dsc_optc_cfg->is_pixel_format_444 = dsc_reg_vals->pixel_format == DSC_PIXFMT_RGB || in dsc_prepare_config()
411 dsc_reg_vals->pixel_format == DSC_PIXFMT_YCBCR444 || in dsc_prepare_config()
412 dsc_reg_vals->pixel_format == DSC_PIXFMT_SIMPLE_YCBCR422; in dsc_prepare_config()
555 INPUT_PIXEL_FORMAT, reg_vals->pixel_format, in dsc_write_to_registers()
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/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_dpp.c290 uint32_t pixel_format; in dpp1_cnv_setup() local
303 pixel_format = 0; in dpp1_cnv_setup()
333 pixel_format = 1; in dpp1_cnv_setup()
336 pixel_format = 3; in dpp1_cnv_setup()
341 pixel_format = 8; in dpp1_cnv_setup()
345 pixel_format = 10; in dpp1_cnv_setup()
349 pixel_format = 65; in dpp1_cnv_setup()
355 pixel_format = 64; in dpp1_cnv_setup()
361 pixel_format = 67; in dpp1_cnv_setup()
367 pixel_format = 66; in dpp1_cnv_setup()
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/drivers/firmware/efi/libstub/
Dgop.c164 pf = info->pixel_format; in choose_mode_modenum()
176 static u8 pixel_bpp(int pixel_format, efi_pixel_bitmask_t pixel_info) in pixel_bpp() argument
178 if (pixel_format == PIXEL_BIT_MASK) { in pixel_bpp()
205 pf = info->pixel_format; in choose_mode_res()
226 pf = info->pixel_format; in choose_mode_res()
268 pf = info->pixel_format; in choose_mode_auto()
286 pf = info->pixel_format; in choose_mode_auto()
340 pf = info->pixel_format; in choose_mode_list()
431 efi_pixel_bitmask_t pixel_info, int pixel_format) in setup_pixel_info() argument
433 if (pixel_format == PIXEL_BIT_MASK) { in setup_pixel_info()
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/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dpp.c180 uint32_t pixel_format = 0; in dpp3_cnv_setup() local
208 pixel_format = 1; in dpp3_cnv_setup()
211 pixel_format = 3; in dpp3_cnv_setup()
216 pixel_format = 8; in dpp3_cnv_setup()
220 pixel_format = 10; in dpp3_cnv_setup()
225 pixel_format = 65; in dpp3_cnv_setup()
231 pixel_format = 64; in dpp3_cnv_setup()
237 pixel_format = 67; in dpp3_cnv_setup()
243 pixel_format = 66; in dpp3_cnv_setup()
249 pixel_format = 26; /* ARGB16161616_UNORM */ in dpp3_cnv_setup()
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/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_formats.c36 .base.pixel_format = DRM_FORMAT_ ## fmt, \
55 .base.pixel_format = DRM_FORMAT_ ## fmt, \
75 .base.pixel_format = DRM_FORMAT_ ## fmt, \
93 .base.pixel_format = DRM_FORMAT_ ## fmt, \
112 .base.pixel_format = DRM_FORMAT_ ## fmt, \
130 .base.pixel_format = DRM_FORMAT_ ## fmt, \
149 .base.pixel_format = DRM_FORMAT_ ## fmt, \
169 .base.pixel_format = DRM_FORMAT_ ## fmt, \
579 if (fmt->base.pixel_format == DRM_FORMAT_NV12) { in _dpu_format_get_media_color_ubwc()
591 if (fmt->base.pixel_format == dpu_media_ubwc_map[i].format) { in _dpu_format_get_media_color_ubwc()
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Ddpu_trace.h639 uint32_t stage_idx, enum dpu_sspp sspp, uint32_t pixel_format,
642 pixel_format, modifier),
654 __field( uint32_t, pixel_format )
668 __entry->pixel_format = pixel_format;
680 __entry->pixel_format, __entry->modifier)
/drivers/gpu/drm/msm/disp/
Dmdp_format.c64 .base = { .pixel_format = DRM_FORMAT_ ## name }, \
157 pixel_formats[i] = f->base.pixel_format; in mdp_get_formats()
169 if (f->base.pixel_format == format) in mdp_get_format()
/drivers/gpu/drm/i915/display/
Di9xx_plane.c687 u32 pixel_format, u64 modifier, in hsw_primary_max_stride() argument
690 const struct drm_format_info *info = drm_format_info(pixel_format); in hsw_primary_max_stride()
699 u32 pixel_format, u64 modifier, in ilk_primary_max_stride() argument
702 const struct drm_format_info *info = drm_format_info(pixel_format); in ilk_primary_max_stride()
714 u32 pixel_format, u64 modifier, in i965_plane_max_stride() argument
717 const struct drm_format_info *info = drm_format_info(pixel_format); in i965_plane_max_stride()
729 u32 pixel_format, u64 modifier, in i9xx_plane_max_stride() argument
968 int fourcc, pixel_format; in i9xx_get_initial_plane_config() local
1004 pixel_format = val & DISPPLANE_PIXFORMAT_MASK; in i9xx_get_initial_plane_config()
1005 fourcc = i9xx_format_to_fourcc(pixel_format); in i9xx_get_initial_plane_config()
Dvlv_dsi_pll.c125 dsi_clk = dsi_clk_from_pclk(intel_dsi->pclk, intel_dsi->pixel_format, in vlv_dsi_pll_compute()
263 int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); in vlv_dsi_get_pclk()
330 int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); in bxt_dsi_get_pclk()
467 dsi_clk = dsi_clk_from_pclk(intel_dsi->pclk, intel_dsi->pixel_format, in bxt_dsi_pll_compute()
Di9xx_plane.h19 u32 pixel_format, u64 modifier,
Dskl_universal_plane.c489 u32 pixel_format, u64 modifier, in skl_plane_max_stride() argument
493 const struct drm_format_info *info = drm_format_info(pixel_format); in skl_plane_max_stride()
689 static u32 skl_plane_ctl_format(u32 pixel_format) in skl_plane_ctl_format() argument
691 switch (pixel_format) { in skl_plane_ctl_format()
745 MISSING_CASE(pixel_format); in skl_plane_ctl_format()
2203 int fourcc, pixel_format; in skl_get_initial_plane_config() local
2232 pixel_format = val & ICL_PLANE_CTL_FORMAT_MASK; in skl_get_initial_plane_config()
2234 pixel_format = val & PLANE_CTL_FORMAT_MASK; in skl_get_initial_plane_config()
2244 fourcc = skl_format_to_fourcc(pixel_format, in skl_get_initial_plane_config()
/drivers/gpu/drm/msm/
Dmsm_fb.c172 (char *)&mode_cmd->pixel_format); in msm_framebuffer_init()
175 format = kms->funcs->get_format(kms, mode_cmd->pixel_format, in msm_framebuffer_init()
179 (char *)&mode_cmd->pixel_format); in msm_framebuffer_init()
240 .pixel_format = format, in msm_alloc_stolen_fb()
/drivers/gpu/drm/i915/gvt/
Dfb_decoder.c42 struct pixel_format { struct
48 static struct pixel_format bdw_pixel_formats[] = { argument
61 static struct pixel_format skl_pixel_formats[] = {
394 static struct pixel_format sprite_pixel_formats[SPRITE_FORMAT_NUM] = {
/drivers/gpu/drm/shmobile/
Dshmob_drm_kms.c97 format = shmob_drm_format_info(mode_cmd->pixel_format); in shmob_drm_fb_create()
100 mode_cmd->pixel_format); in shmob_drm_fb_create()
/drivers/gpu/drm/armada/
Darmada_fb.c28 switch (mode->pixel_format) { in armada_framebuffer_create()
96 mode->width, mode->height, mode->pixel_format, in armada_fb_create()
/drivers/gpu/drm/arm/
Dhdlcd_crtc.c87 uint32_t pixel_format; in hdlcd_set_pxl_fmt() local
91 pixel_format = fb->format->format; in hdlcd_set_pxl_fmt()
94 if (supported_formats[i].fourcc == pixel_format) in hdlcd_set_pxl_fmt()
/drivers/gpu/drm/
Ddrm_framebuffer.c128 r.pixel_format = drm_driver_legacy_fb_format(dev, or->bpp, or->depth); in drm_mode_addfb()
129 if (r.pixel_format == DRM_FORMAT_INVALID) { in drm_mode_addfb()
181 if (!__drm_format_info(r->pixel_format)) { in framebuffer_check()
183 &r->pixel_format); in framebuffer_check()
246 if (r->pixel_format != DRM_FORMAT_NV12 || in framebuffer_check()
596 r->pixel_format = fb->format->format; in drm_mode_getfb2_ioctl()
/drivers/gpu/drm/omapdrm/
Domap_fb.c345 (char *)&mode_cmd->pixel_format); in omap_framebuffer_init()
350 if (formats[i] == mode_cmd->pixel_format) in omap_framebuffer_init()
356 (char *)&mode_cmd->pixel_format); in omap_framebuffer_init()
/drivers/gpu/drm/nouveau/
Dnouveau_display.c317 (mode_cmd->pixel_format == DRM_FORMAT_YUYV || in nouveau_framebuffer_new()
318 mode_cmd->pixel_format == DRM_FORMAT_UYVY || in nouveau_framebuffer_new()
319 mode_cmd->pixel_format == DRM_FORMAT_NV12 || in nouveau_framebuffer_new()
320 mode_cmd->pixel_format == DRM_FORMAT_NV21) && in nouveau_framebuffer_new()
326 &mode_cmd->pixel_format, in nouveau_framebuffer_new()
/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5_plane.c591 uint32_t pixel_format, uint32_t src, uint32_t dest, in calc_scalex_steps() argument
594 const struct drm_format_info *info = drm_format_info(pixel_format); in calc_scalex_steps()
614 uint32_t pixel_format, uint32_t src, uint32_t dest, in calc_scaley_steps() argument
617 const struct drm_format_info *info = drm_format_info(pixel_format); in calc_scaley_steps()
639 const struct drm_format_info *info = drm_format_info(format->base.pixel_format); in get_scale_config()
694 const struct drm_format_info *info = drm_format_info(format->base.pixel_format); in mdp5_write_pixel_ext()
889 pix_format = format->base.pixel_format; in mdp5_plane_mode_set()
/drivers/gpu/drm/hisilicon/kirin/
Dkirin_drm_drv.h18 u32 pixel_format; member
/drivers/gpu/drm/arm/display/komeda/
Dkomeda_framebuffer.c171 mode_cmd->pixel_format, in komeda_fb_create()
175 mode_cmd->pixel_format); in komeda_fb_create()
/drivers/gpu/drm/tiny/
Dcirrus.c494 if (mode_cmd->pixel_format != DRM_FORMAT_RGB565 && in cirrus_fb_create()
495 mode_cmd->pixel_format != DRM_FORMAT_RGB888 && in cirrus_fb_create()
496 mode_cmd->pixel_format != DRM_FORMAT_XRGB8888) in cirrus_fb_create()

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