| /drivers/staging/rtl8712/ |
| D | rtl871x_mp.c | 349 set_bb_reg(pAdapter, rFPGA0_RFMOD, bRFMOD, 0x0); in r8712_SwitchBandwidth()
359 set_bb_reg(pAdapter, rFPGA0_RFMOD, bRFMOD, 0x1); in r8712_SwitchBandwidth()
504 if (!get_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) in r8712_SetSingleCarrierTx()
506 set_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable); in r8712_SetSingleCarrierTx()
542 set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn, bDisable); in r8712_SetSingleToneTx()
543 set_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bDisable); in r8712_SetSingleToneTx()
551 set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable); in r8712_SetSingleToneTx()
552 set_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable); in r8712_SetSingleToneTx()
567 if (!get_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn)) { in r8712_SetCarrierSuppressionTx()
569 set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn, in r8712_SetCarrierSuppressionTx()
[all …]
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| D | rtl871x_mp_phy_regdef.h | 85 #define rFPGA0_RFMOD 0x800 /*RF mode & CCK TxSC RF macro
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| /drivers/staging/r8188eu/hal/ |
| D | rtl8188e_mp.c | 554 if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) in Hal_SetSingleCarrierTx()
555 write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);/* set OFDM block on */ in Hal_SetSingleCarrierTx()
616 PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0); in Hal_SetSingleToneTx()
617 PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0); in Hal_SetSingleToneTx()
648 write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); in Hal_SetSingleToneTx()
649 write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); in Hal_SetSingleToneTx()
676 if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) in Hal_SetCarrierSuppressionTx()
677 write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/* set CCK block on */ in Hal_SetCarrierSuppressionTx()
717 if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) in Hal_SetCCKContinuousTx()
718 write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/* set CCK block on */ in Hal_SetCCKContinuousTx()
[all …]
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| D | rtl8188e_phycfg.c | 1004 PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); in _PHY_SetBWMode92C()
1009 PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); in _PHY_SetBWMode92C()
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| D | HalPhyRf_8188e.c | 882 rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD in phy_IQCalibrate_8188E()
910 ODM_SetBBReg(dm_odm, rFPGA0_RFMOD, BIT(24), 0x00); in phy_IQCalibrate_8188E()
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| D | usb_halinit.c | 622 PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1); in _BBTurnOnBlock()
623 PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); in _BBTurnOnBlock()
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| /drivers/staging/rtl8192u/ |
| D | r819xU_phyreg.h | 8 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ macro
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| D | r819xU_phy.c | 784 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x0); in rtl8192_BB_Config_ParaFile()
1501 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x0); in rtl8192_SetBWModeWorkItem()
1531 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x1); in rtl8192_SetBWModeWorkItem()
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| D | r8192U_core.c | 2788 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1); in rtl8192_adapter_start()
2789 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1); in rtl8192_adapter_start()
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| /drivers/staging/rtl8723bs/hal/ |
| D | rtl8723b_phycfg.c | 639 PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); in phy_PostSetBwMode8723B()
648 PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); in phy_PostSetBwMode8723B()
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| /drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_phy.c | 552 rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x0); in _rtl92e_bb_config_para_file()
1192 rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bRFMOD, 0x0); in _rtl92e_set_bw_mode_work_item()
1207 rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bRFMOD, 0x1); in _rtl92e_set_bw_mode_work_item()
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| D | r8192E_phyreg.h | 47 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ macro
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| D | r8192E_dev.c | 852 rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bCCKEn, 0x1); in rtl92e_start_adapter()
853 rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1); in rtl92e_start_adapter()
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| /drivers/staging/r8188eu/include/ |
| D | Hal8188EPhyReg.h | 54 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC RF BW Setting */ macro
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| D | rtw_mp_phy_regdef.h | 87 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC RF BW Setting?? */ macro
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| /drivers/staging/rtl8723bs/include/ |
| D | Hal8192CPhyReg.h | 92 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC RF BW Setting?? */ macro
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