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Searched refs:rFPGA0_XB_HSSIParameter1 (Results 1 – 12 of 12) sorted by relevance

/drivers/staging/r8188eu/hal/
Drtl8188e_mp.c567 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); in Hal_SetSingleCarrierTx()
582 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); in Hal_SetSingleCarrierTx()
637 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); in Hal_SetSingleToneTx()
665 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); in Hal_SetSingleToneTx()
693 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); in Hal_SetCarrierSuppressionTx()
707 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); in Hal_SetCarrierSuppressionTx()
732 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); in Hal_SetCCKContinuousTx()
743 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); in Hal_SetCCKContinuousTx()
769 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); in Hal_SetOFDMContinuousTx()
783 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); in Hal_SetOFDMContinuousTx()
Drtl8188e_phycfg.c183 RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT(8)); in phy_RFSerialRead()
430 …pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; /* wire control parameter1… in phy_InitBBRFRegisterDefinition()
DHalPhyRf_8188e.c764 ODM_SetBBReg(dm_odm, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); in _PHY_PIModeSwitch()
/drivers/staging/rtl8192u/
Dr819xU_phyreg.h12 #define rFPGA0_XB_HSSIParameter1 0x828 macro
Dr819xU_phy.c609 priv->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; in rtl8192_InitBBRFRegDef()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h55 #define rFPGA0_XB_HSSIParameter1 0x828 macro
Dr8192E_phy.c418 priv->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; in _rtl92e_init_bb_rf_reg_def()
/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h95 #define rFPGA0_XB_HSSIParameter1 0x828 macro
/drivers/staging/r8188eu/include/
DHal8188EPhyReg.h66 #define rFPGA0_XB_HSSIParameter1 0x828 macro
Drtw_mp_phy_regdef.h101 #define rFPGA0_XB_HSSIParameter1 0x828 macro
/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h104 #define rFPGA0_XB_HSSIParameter1 0x828 macro
/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c135 RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1|MaskforPhySet, BIT8); in phy_RFSerialRead_8723B()