Searched refs:rFPGA0_XB_HSSIParameter2 (Results 1 – 12 of 12) sorted by relevance
| /drivers/staging/rtl8192u/ |
| D | r819xU_phyreg.h | 13 #define rFPGA0_XB_HSSIParameter2 0x82c macro
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| D | r819xU_phy.c | 616 priv->PHYRegDef[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; in rtl8192_InitBBRFRegDef()
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| /drivers/staging/rtl8723bs/hal/ |
| D | rtl8723b_phycfg.c | 117 tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord); in phy_RFSerialRead_8723B()
119 …PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge… in phy_RFSerialRead_8723B()
326 …pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2… in phy_InitBBRFRegisterDefinition()
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| /drivers/staging/rtl8712/ |
| D | rtl871x_mp.c | 424 set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); in r8712_SwitchAntenna()
431 set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); in r8712_SwitchAntenna()
438 set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); in r8712_SwitchAntenna()
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| D | rtl871x_mp_phy_regdef.h | 96 #define rFPGA0_XB_HSSIParameter2 0x82c macro
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| /drivers/staging/r8188eu/hal/ |
| D | rtl8188e_mp.c | 396 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); in Hal_SetAntenna()
420 PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); in Hal_SetAntenna()
446 PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); in Hal_SetAntenna()
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| D | rtl8188e_phycfg.c | 434 …pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2… in phy_InitBBRFRegisterDefinition()
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| /drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_phyreg.h | 56 #define rFPGA0_XB_HSSIParameter2 0x82c macro
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| D | r8192E_phy.c | 423 priv->PHYRegDef[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; in _rtl92e_init_bb_rf_reg_def()
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| /drivers/staging/r8188eu/include/ |
| D | Hal8188EPhyReg.h | 67 #define rFPGA0_XB_HSSIParameter2 0x82c macro
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| D | rtw_mp_phy_regdef.h | 102 #define rFPGA0_XB_HSSIParameter2 0x82c macro
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| /drivers/staging/rtl8723bs/include/ |
| D | Hal8192CPhyReg.h | 105 #define rFPGA0_XB_HSSIParameter2 0x82c macro
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