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Searched refs:rate (Results 1 – 25 of 1200) sorted by relevance

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/drivers/mmc/host/
Dsdhci-of-aspeed-test.c8 int rate = 52000000; in aspeed_sdhci_phase_ddr52() local
11 aspeed_sdhci_phase_to_tap(NULL, rate, 0)); in aspeed_sdhci_phase_ddr52()
13 aspeed_sdhci_phase_to_tap(NULL, rate, 1)); in aspeed_sdhci_phase_ddr52()
15 aspeed_sdhci_phase_to_tap(NULL, rate, 2)); in aspeed_sdhci_phase_ddr52()
17 aspeed_sdhci_phase_to_tap(NULL, rate, 3)); in aspeed_sdhci_phase_ddr52()
19 aspeed_sdhci_phase_to_tap(NULL, rate, 4)); in aspeed_sdhci_phase_ddr52()
21 aspeed_sdhci_phase_to_tap(NULL, rate, 5)); in aspeed_sdhci_phase_ddr52()
23 aspeed_sdhci_phase_to_tap(NULL, rate, 23)); in aspeed_sdhci_phase_ddr52()
25 aspeed_sdhci_phase_to_tap(NULL, rate, 24)); in aspeed_sdhci_phase_ddr52()
27 aspeed_sdhci_phase_to_tap(NULL, rate, 25)); in aspeed_sdhci_phase_ddr52()
[all …]
/drivers/clk/rockchip/
Dclk-pll.c51 struct rockchip_clk_pll *pll, unsigned long rate) in rockchip_get_pll_settings() argument
57 if (rate == rate_table[i].rate) in rockchip_get_pll_settings()
73 if (drate >= rate_table[i].rate) in rockchip_pll_round_rate()
74 return rate_table[i].rate; in rockchip_pll_round_rate()
78 return rate_table[i - 1].rate; in rockchip_pll_round_rate()
140 struct rockchip_pll_rate_table *rate) in rockchip_rk3036_pll_get_params() argument
145 rate->fbdiv = ((pllcon >> RK3036_PLLCON0_FBDIV_SHIFT) in rockchip_rk3036_pll_get_params()
147 rate->postdiv1 = ((pllcon >> RK3036_PLLCON0_POSTDIV1_SHIFT) in rockchip_rk3036_pll_get_params()
151 rate->refdiv = ((pllcon >> RK3036_PLLCON1_REFDIV_SHIFT) in rockchip_rk3036_pll_get_params()
153 rate->postdiv2 = ((pllcon >> RK3036_PLLCON1_POSTDIV2_SHIFT) in rockchip_rk3036_pll_get_params()
[all …]
/drivers/clk/sunxi-ng/
Dccu_nm.c22 u64 rate = parent; in ccu_nm_calc_rate() local
24 rate *= n; in ccu_nm_calc_rate()
25 do_div(rate, m); in ccu_nm_calc_rate()
27 return rate; in ccu_nm_calc_rate()
30 static void ccu_nm_find_best(unsigned long parent, unsigned long rate, in ccu_nm_find_best() argument
42 if (tmp_rate > rate) in ccu_nm_find_best()
45 if ((rate - tmp_rate) < (rate - best_rate)) { in ccu_nm_find_best()
82 unsigned long rate; in ccu_nm_recalc_rate() local
87 rate = ccu_frac_helper_read_rate(&nm->common, &nm->frac); in ccu_nm_recalc_rate()
90 rate /= nm->fixed_post_div; in ccu_nm_recalc_rate()
[all …]
Dccu_mp.c13 static void ccu_mp_find_best(unsigned long parent, unsigned long rate, in ccu_mp_find_best() argument
25 if (tmp_rate > rate) in ccu_mp_find_best()
28 if ((rate - tmp_rate) < (rate - best_rate)) { in ccu_mp_find_best()
42 unsigned long rate, in ccu_mp_find_best_with_parent_adj() argument
59 maxdiv = min(ULONG_MAX / rate, maxdiv); in ccu_mp_find_best_with_parent_adj()
68 if (rate * div == parent_rate_saved) { in ccu_mp_find_best_with_parent_adj()
76 return rate; in ccu_mp_find_best_with_parent_adj()
79 parent_rate = clk_hw_round_rate(hw, rate * div); in ccu_mp_find_best_with_parent_adj()
82 if (now <= rate && now > best_rate) { in ccu_mp_find_best_with_parent_adj()
86 if (now == rate) in ccu_mp_find_best_with_parent_adj()
[all …]
Dccu_nkmp.c24 u64 rate = parent; in ccu_nkmp_calc_rate() local
26 rate *= n * k; in ccu_nkmp_calc_rate()
27 do_div(rate, m * p); in ccu_nkmp_calc_rate()
29 return rate; in ccu_nkmp_calc_rate()
32 static void ccu_nkmp_find_best(unsigned long parent, unsigned long rate, in ccu_nkmp_find_best() argument
49 if (tmp_rate > rate) in ccu_nkmp_find_best()
52 if ((rate - tmp_rate) < (rate - best_rate)) { in ccu_nkmp_find_best()
95 unsigned long n, m, k, p, rate; in ccu_nkmp_recalc_rate() local
121 rate = ccu_nkmp_calc_rate(parent_rate, n, k, m, 1 << p); in ccu_nkmp_recalc_rate()
123 rate /= nkmp->fixed_post_div; in ccu_nkmp_recalc_rate()
[all …]
/drivers/net/wireless/intel/iwlwifi/mvm/
Drs.c121 struct rs_rate *rate,
133 struct rs_rate *rate, in rs_ant_allow() argument
140 struct rs_rate *rate, in rs_mimo_allow() argument
162 struct rs_rate *rate, in rs_siso_allow() argument
172 struct rs_rate *rate, in rs_sgi_allow() argument
178 if (is_ht20(rate) && (ht_cap->cap & in rs_sgi_allow()
181 if (is_ht40(rate) && (ht_cap->cap & in rs_sgi_allow()
184 if (is_ht80(rate) && (vht_cap->cap & in rs_sgi_allow()
187 if (is_ht160(rate) && (vht_cap->cap & in rs_sgi_allow()
520 static char *rs_pretty_rate(const struct rs_rate *rate) in rs_pretty_rate() argument
[all …]
Drs.h195 #define is_legacy(rate) is_type_legacy((rate)->type) argument
196 #define is_ht_siso(rate) is_type_ht_siso((rate)->type) argument
197 #define is_ht_mimo2(rate) is_type_ht_mimo2((rate)->type) argument
198 #define is_vht_siso(rate) is_type_vht_siso((rate)->type) argument
199 #define is_vht_mimo2(rate) is_type_vht_mimo2((rate)->type) argument
200 #define is_siso(rate) is_type_siso((rate)->type) argument
201 #define is_mimo2(rate) is_type_mimo2((rate)->type) argument
202 #define is_mimo(rate) is_type_mimo((rate)->type) argument
203 #define is_ht(rate) is_type_ht((rate)->type) argument
204 #define is_vht(rate) is_type_vht((rate)->type) argument
[all …]
/drivers/staging/rtl8723bs/include/
Dhal_com.h49 #define HDATA_RATE(rate)\ argument
50 (rate == DESC_RATE1M) ? "CCK_1M" : \
51 (rate == DESC_RATE2M) ? "CCK_2M" : \
52 (rate == DESC_RATE5_5M) ? "CCK5_5M" : \
53 (rate == DESC_RATE11M) ? "CCK_11M" : \
54 (rate == DESC_RATE6M) ? "OFDM_6M" : \
55 (rate == DESC_RATE9M) ? "OFDM_9M" : \
56 (rate == DESC_RATE12M) ? "OFDM_12M" : \
57 (rate == DESC_RATE18M) ? "OFDM_18M" : \
58 (rate == DESC_RATE24M) ? "OFDM_24M" : \
[all …]
/drivers/clk/samsung/
Dclk-pll.c39 struct samsung_clk_pll *pll, unsigned long rate) in samsung_get_pll_settings() argument
45 if (rate == rate_table[i].rate) in samsung_get_pll_settings()
61 if (drate >= rate_table[i].rate) in samsung_pll_round_rate()
62 return rate_table[i].rate; in samsung_pll_round_rate()
66 return rate_table[i - 1].rate; in samsung_pll_round_rate()
238 const struct samsung_pll_rate_table *rate, u32 pll_con) in samsung_pll35xx_mp_change() argument
245 return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv); in samsung_pll35xx_mp_change()
252 const struct samsung_pll_rate_table *rate; in samsung_pll35xx_set_rate() local
256 rate = samsung_get_pll_settings(pll, drate); in samsung_pll35xx_set_rate()
257 if (!rate) { in samsung_pll35xx_set_rate()
[all …]
/drivers/net/wireless/realtek/rtw88/
Dphy.c1085 u32 addr, u32 mask, u32 val, u8 *rate, in rtw_phy_get_rate_values_of_txpwr_by_rate() argument
1093 rate[0] = DESC_RATE6M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1094 rate[1] = DESC_RATE9M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1095 rate[2] = DESC_RATE12M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1096 rate[3] = DESC_RATE18M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1103 rate[0] = DESC_RATE24M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1104 rate[1] = DESC_RATE36M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1105 rate[2] = DESC_RATE48M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1106 rate[3] = DESC_RATE54M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1112 rate[0] = DESC_RATE1M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
[all …]
Dutil.c82 void rtw_desc_to_mcsrate(u16 rate, u8 *mcs, u8 *nss) in rtw_desc_to_mcsrate() argument
84 if (rate <= DESC_RATE54M) in rtw_desc_to_mcsrate()
87 if (rate >= DESC_RATEVHT1SS_MCS0 && in rtw_desc_to_mcsrate()
88 rate <= DESC_RATEVHT1SS_MCS9) { in rtw_desc_to_mcsrate()
90 *mcs = rate - DESC_RATEVHT1SS_MCS0; in rtw_desc_to_mcsrate()
91 } else if (rate >= DESC_RATEVHT2SS_MCS0 && in rtw_desc_to_mcsrate()
92 rate <= DESC_RATEVHT2SS_MCS9) { in rtw_desc_to_mcsrate()
94 *mcs = rate - DESC_RATEVHT2SS_MCS0; in rtw_desc_to_mcsrate()
95 } else if (rate >= DESC_RATEVHT3SS_MCS0 && in rtw_desc_to_mcsrate()
96 rate <= DESC_RATEVHT3SS_MCS9) { in rtw_desc_to_mcsrate()
[all …]
/drivers/clk/meson/
Dclk-pll.c60 u64 rate = (u64)parent_rate * m; in __pll_params_to_rate() local
65 rate += DIV_ROUND_UP_ULL(frac_rate, in __pll_params_to_rate()
69 return DIV_ROUND_UP_ULL(rate, n); in __pll_params_to_rate()
98 static unsigned int __pll_params_with_frac(unsigned long rate, in __pll_params_with_frac() argument
105 u64 val = (u64)rate * n; in __pll_params_with_frac()
108 if (rate < parent_rate * m / n) in __pll_params_with_frac()
121 static bool meson_clk_pll_is_better(unsigned long rate, in meson_clk_pll_is_better() argument
128 if (abs(now - rate) < abs(best - rate)) in meson_clk_pll_is_better()
132 if (now <= rate && best < now) in meson_clk_pll_is_better()
153 static unsigned int meson_clk_get_pll_range_m(unsigned long rate, in meson_clk_get_pll_range_m() argument
[all …]
/drivers/clk/actions/
Dowl-composite.c56 static long owl_comp_div_round_rate(struct clk_hw *hw, unsigned long rate, in owl_comp_div_round_rate() argument
61 return owl_divider_helper_round_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_round_rate()
62 rate, parent_rate); in owl_comp_div_round_rate()
70 return owl_divider_helper_recalc_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_recalc_rate()
74 static int owl_comp_div_set_rate(struct clk_hw *hw, unsigned long rate, in owl_comp_div_set_rate() argument
79 return owl_divider_helper_set_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_set_rate()
80 rate, parent_rate); in owl_comp_div_set_rate()
83 static long owl_comp_fact_round_rate(struct clk_hw *hw, unsigned long rate, in owl_comp_fact_round_rate() argument
89 &comp->rate.factor_hw, in owl_comp_fact_round_rate()
90 rate, parent_rate); in owl_comp_fact_round_rate()
[all …]
Dowl-factor.c45 unsigned long rate, unsigned long parent_rate) in _get_table_val() argument
55 if ((unsigned long)calc_rate <= rate) { in _get_table_val()
68 struct clk_hw *hw, unsigned long rate, in owl_clk_val_best() argument
76 if (!rate) in owl_clk_val_best()
77 rate = 1; in owl_clk_val_best()
81 bestval = _get_table_val(clkt, rate, parent_rate); in owl_clk_val_best()
86 try_parent_rate = rate * clkt->div / clkt->mul; in owl_clk_val_best()
104 if (cur_rate <= rate && cur_rate > best) { in owl_clk_val_best()
122 unsigned long rate, in owl_factor_helper_round_rate() argument
128 val = owl_clk_val_best(factor_hw, &common->hw, rate, parent_rate); in owl_factor_helper_round_rate()
[all …]
/drivers/clk/
Dclk-cdce925.c109 static void cdce925_pll_find_rate(unsigned long rate, in cdce925_pll_find_rate() argument
116 if (rate <= parent_rate) { in cdce925_pll_find_rate()
118 rate = parent_rate; in cdce925_pll_find_rate()
123 if (rate < CDCE925_PLL_FREQUENCY_MIN) in cdce925_pll_find_rate()
124 rate = CDCE925_PLL_FREQUENCY_MIN; in cdce925_pll_find_rate()
125 else if (rate > CDCE925_PLL_FREQUENCY_MAX) in cdce925_pll_find_rate()
126 rate = CDCE925_PLL_FREQUENCY_MAX; in cdce925_pll_find_rate()
128 g = gcd(rate, parent_rate); in cdce925_pll_find_rate()
130 un = rate / g; in cdce925_pll_find_rate()
146 static long cdce925_pll_round_rate(struct clk_hw *hw, unsigned long rate, in cdce925_pll_round_rate() argument
[all …]
Dclk-vt8500.c131 static long vt8500_dclk_round_rate(struct clk_hw *hw, unsigned long rate, in vt8500_dclk_round_rate() argument
137 if (rate == 0) in vt8500_dclk_round_rate()
140 divisor = *prate / rate; in vt8500_dclk_round_rate()
143 if (rate * divisor < *prate) in vt8500_dclk_round_rate()
157 static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate, in vt8500_dclk_set_rate() argument
164 if (rate == 0) in vt8500_dclk_set_rate()
167 divisor = parent_rate / rate; in vt8500_dclk_set_rate()
350 static int vt8500_find_pll_bits(unsigned long rate, unsigned long parent_rate, in vt8500_find_pll_bits() argument
356 if ((rate < parent_rate * 4) || (rate > parent_rate * 62)) { in vt8500_find_pll_bits()
362 if (rate <= parent_rate * 31) in vt8500_find_pll_bits()
[all …]
Dclk-sparx5.c61 unsigned long rate = parent_rate / conf->div; in s5_calc_freq() local
68 rate = mult_frac(rate, divt, divb); in s5_calc_freq()
69 rate = roundup(rate, 1000); in s5_calc_freq()
72 return rate; in s5_calc_freq()
75 static void s5_search_fractional(unsigned long rate, in s5_search_fractional() argument
81 ulong cur_offset, best_offset = rate; in s5_search_fractional()
95 cur_offset = abs(rate - conf->freq); in s5_search_fractional()
108 static unsigned long s5_calc_params(unsigned long rate, in s5_calc_params() argument
112 if (parent_rate % rate) { in s5_calc_params()
116 div = DIV_ROUND_CLOSEST_ULL(parent_rate, rate); in s5_calc_params()
[all …]
Dclk-divider.c220 unsigned long parent_rate, unsigned long rate, in _div_round_up() argument
223 int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); in _div_round_up()
234 unsigned long parent_rate, unsigned long rate, in _div_round_closest() argument
240 up = DIV_ROUND_UP_ULL((u64)parent_rate, rate); in _div_round_closest()
241 down = parent_rate / rate; in _div_round_closest()
254 return (rate - up_rate) <= (down_rate - rate) ? up : down; in _div_round_closest()
258 unsigned long parent_rate, unsigned long rate, in _div_round() argument
262 return _div_round_closest(table, parent_rate, rate, flags); in _div_round()
264 return _div_round_up(table, parent_rate, rate, flags); in _div_round()
267 static bool _is_best_div(unsigned long rate, unsigned long now, in _is_best_div() argument
[all …]
Dclk-si5351.c270 unsigned long rate; in si5351_clkin_recalc_rate() local
273 rate = parent_rate; in si5351_clkin_recalc_rate()
276 rate /= 8; in si5351_clkin_recalc_rate()
279 rate /= 4; in si5351_clkin_recalc_rate()
282 rate /= 2; in si5351_clkin_recalc_rate()
291 __func__, (1 << (idiv >> 6)), rate); in si5351_clkin_recalc_rate()
293 return rate; in si5351_clkin_recalc_rate()
326 static int si5351_vxco_set_rate(struct clk_hw *hw, unsigned long rate, in si5351_vxco_set_rate() argument
421 unsigned long long rate; in si5351_pll_recalc_rate() local
430 rate = hwdata->params.p1 * hwdata->params.p3; in si5351_pll_recalc_rate()
[all …]
Dclk-multiplier.c32 unsigned long rate, in __get_mult() argument
36 return DIV_ROUND_CLOSEST(rate, parent_rate); in __get_mult()
38 return rate / parent_rate; in __get_mult()
56 static bool __is_best_rate(unsigned long rate, unsigned long new, in __is_best_rate() argument
60 return abs(rate - new) < abs(rate - best); in __is_best_rate()
62 return new >= rate && new < best; in __is_best_rate()
65 static unsigned long __bestmult(struct clk_hw *hw, unsigned long rate, in __bestmult() argument
76 bestmult = rate / orig_parent_rate; in __bestmult()
91 if (rate == orig_parent_rate * i) { in __bestmult()
102 rate / i); in __bestmult()
[all …]
/drivers/clk/imx/
Dclk-pllv3.c119 static long clk_pllv3_round_rate(struct clk_hw *hw, unsigned long rate, in clk_pllv3_round_rate() argument
124 return (rate >= parent_rate * 22) ? parent_rate * 22 : in clk_pllv3_round_rate()
128 static int clk_pllv3_set_rate(struct clk_hw *hw, unsigned long rate, in clk_pllv3_set_rate() argument
134 if (rate == parent_rate * 22) in clk_pllv3_set_rate()
136 else if (rate == parent_rate * 20) in clk_pllv3_set_rate()
167 static long clk_pllv3_sys_round_rate(struct clk_hw *hw, unsigned long rate, in clk_pllv3_sys_round_rate() argument
175 if (rate > max_rate) in clk_pllv3_sys_round_rate()
176 rate = max_rate; in clk_pllv3_sys_round_rate()
177 else if (rate < min_rate) in clk_pllv3_sys_round_rate()
178 rate = min_rate; in clk_pllv3_sys_round_rate()
[all …]
/drivers/memory/tegra/
Dtegra20-emc.c160 unsigned long rate; member
228 unsigned long rate) in tegra_emc_find_timing() argument
234 if (emc->timings[i].rate >= rate) { in tegra_emc_find_timing()
241 dev_err(emc->dev, "no timing for rate %lu\n", rate); in tegra_emc_find_timing()
248 static int emc_prepare_timing_change(struct tegra_emc *emc, unsigned long rate) in emc_prepare_timing_change() argument
250 struct emc_timing *timing = tegra_emc_find_timing(emc, rate); in emc_prepare_timing_change()
257 __func__, timing->rate, rate); in emc_prepare_timing_change()
330 u32 rate; in load_one_timing_from_dt() local
338 err = of_property_read_u32(node, "clock-frequency", &rate); in load_one_timing_from_dt()
359 timing->rate = rate * 2 * 1000; in load_one_timing_from_dt()
[all …]
Dtegra186-emc.c16 unsigned long rate; member
60 unsigned long rate) in tegra186_emc_validate_rate() argument
65 if (rate == emc->dvfs[i].rate) in tegra186_emc_validate_rate()
79 seq_printf(s, "%s%lu", prefix, emc->dvfs[i].rate); in tegra186_emc_debug_available_rates_show()
102 static int tegra186_emc_debug_min_rate_get(void *data, u64 *rate) in tegra186_emc_debug_min_rate_get() argument
106 *rate = emc->debugfs.min_rate; in tegra186_emc_debug_min_rate_get()
111 static int tegra186_emc_debug_min_rate_set(void *data, u64 rate) in tegra186_emc_debug_min_rate_set() argument
116 if (!tegra186_emc_validate_rate(emc, rate)) in tegra186_emc_debug_min_rate_set()
119 err = clk_set_min_rate(emc->clk, rate); in tegra186_emc_debug_min_rate_set()
123 emc->debugfs.min_rate = rate; in tegra186_emc_debug_min_rate_set()
[all …]
/drivers/clk/qcom/
Dclk-rcg2.c149 calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 hid_div) in calc_rate() argument
152 rate = mult_frac(rate, 2, hid_div + 1); in calc_rate()
155 rate = mult_frac(rate, m, n); in calc_rate()
157 return rate; in calc_rate()
191 unsigned long clk_flags, rate = req->rate; in _freq_tbl_determine_rate() local
198 f = qcom_find_freq_floor(f, rate); in _freq_tbl_determine_rate()
201 f = qcom_find_freq(f, rate); in _freq_tbl_determine_rate()
220 rate = f->freq; in _freq_tbl_determine_rate()
222 if (!rate) in _freq_tbl_determine_rate()
223 rate = req->rate; in _freq_tbl_determine_rate()
[all …]
/drivers/clk/at91/
Dclk-audio-pll.c216 static int clk_audio_pll_frac_compute_frac(unsigned long rate, in clk_audio_pll_frac_compute_frac() argument
223 if (!rate) in clk_audio_pll_frac_compute_frac()
226 tmp = rate; in clk_audio_pll_frac_compute_frac()
251 req->rate, req->best_parent_rate); in clk_audio_pll_frac_determine_rate()
253 req->rate = clamp(req->rate, AUDIO_PLL_FOUT_MIN, AUDIO_PLL_FOUT_MAX); in clk_audio_pll_frac_determine_rate()
258 ret = clk_audio_pll_frac_compute_frac(req->rate, req->best_parent_rate, in clk_audio_pll_frac_determine_rate()
263 req->rate = clk_audio_pll_fout(req->best_parent_rate, nd, fracr); in clk_audio_pll_frac_determine_rate()
268 __func__, req->rate, nd, fracr); in clk_audio_pll_frac_determine_rate()
273 static long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate, in clk_audio_pll_pad_round_rate() argument
286 rate, *parent_rate); in clk_audio_pll_pad_round_rate()
[all …]

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