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Searched refs:readq (Results 1 – 25 of 154) sorted by relevance

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/drivers/fpga/
Ddfl-fme-main.c35 v = readq(base + FME_HDR_CAP); in ports_num_show()
54 v = readq(base + FME_HDR_BITSTREAM_ID); in bitstream_id_show()
72 v = readq(base + FME_HDR_BITSTREAM_MD); in bitstream_metadata_show()
86 v = readq(base + FME_HDR_CAP); in cache_size_show()
101 v = readq(base + FME_HDR_CAP); in fabric_version_show()
116 v = readq(base + FME_HDR_CAP); in socket_id_show()
207 u64 v = readq(base + FME_THERM_CAP); in fme_thermal_throttle_support()
233 v = readq(feature->ioaddr + FME_THERM_RDSENSOR_FMT1); in thermal_hwmon_read()
237 v = readq(feature->ioaddr + FME_THERM_THRESHOLD); in thermal_hwmon_read()
241 v = readq(feature->ioaddr + FME_THERM_THRESHOLD); in thermal_hwmon_read()
[all …]
Ddfl-fme-mgr.c97 pr_status = readq(fme_pr + FME_PR_STS); in fme_mgr_pr_error_handle()
101 pr_error = readq(fme_pr + FME_PR_ERR); in fme_mgr_pr_error_handle()
123 pr_ctrl = readq(fme_pr + FME_PR_CTRL); in fme_mgr_write_init()
134 pr_ctrl = readq(fme_pr + FME_PR_CTRL); in fme_mgr_write_init()
157 pr_ctrl = readq(fme_pr + FME_PR_CTRL); in fme_mgr_write_init()
176 pr_ctrl = readq(fme_pr + FME_PR_CTRL); in fme_mgr_write()
188 pr_status = readq(fme_pr + FME_PR_STS); in fme_mgr_write()
199 pr_status = readq(fme_pr + FME_PR_STS); in fme_mgr_write()
228 pr_ctrl = readq(fme_pr + FME_PR_CTRL); in fme_mgr_write_complete()
272 id->id_l = readq(fme_pr + FME_PR_INTFC_ID_L); in fme_mgr_get_compat_id()
[all …]
Ddfl-fme-error.c52 value = readq(base + PCIE0_ERROR); in pcie0_errors_show()
75 v = readq(base + PCIE0_ERROR); in pcie0_errors_store()
97 value = readq(base + PCIE1_ERROR); in pcie1_errors_show()
120 v = readq(base + PCIE1_ERROR); in pcie1_errors_store()
140 (unsigned long long)readq(base + RAS_NONFAT_ERROR)); in nonfatal_errors_show()
152 (unsigned long long)readq(base + RAS_CATFAT_ERROR)); in catfatal_errors_show()
166 v = readq(base + RAS_ERROR_INJECT); in inject_errors_show()
191 v = readq(base + RAS_ERROR_INJECT); in inject_errors_store()
211 value = readq(base + FME_ERROR); in fme_errors_show()
234 v = readq(base + FME_ERROR); in fme_errors_store()
[all …]
Ddfl-afu-error.c76 v = readq(base_hdr + PORT_HDR_STS); in afu_port_err_clear()
91 v = readq(base_err + PORT_ERROR); in afu_port_err_clear()
96 v = readq(base_err + PORT_FIRST_ERROR); in afu_port_err_clear()
125 error = readq(base + PORT_ERROR); in errors_show()
156 error = readq(base + PORT_FIRST_ERROR); in first_error_show()
174 req0 = readq(base + PORT_MALFORMED_REQ0); in first_malformed_req_show()
175 req1 = readq(base + PORT_MALFORMED_REQ1); in first_malformed_req_show()
Ddfl-afu-main.c52 v = readq(base + PORT_HDR_CTRL); in __afu_port_enable()
90 v = readq(base + PORT_HDR_CTRL); in __afu_port_disable()
150 return FIELD_GET(PORT_CAP_PORT_NUM, readq(base + PORT_HDR_CAP)); in port_get_id()
172 v = readq(base + PORT_HDR_CTRL); in ltr_show()
193 v = readq(base + PORT_HDR_CTRL); in ltr_store()
213 v = readq(base + PORT_HDR_STS); in ap1_event_show()
251 v = readq(base + PORT_HDR_STS); in ap2_event_show()
288 v = readq(base + PORT_HDR_STS); in power_state_show()
348 userclk_freqsts = readq(base + PORT_HDR_USRCLK_STS0); in userclk_freqsts_show()
366 userclk_freqcntrsts = readq(base + PORT_HDR_USRCLK_STS1); in userclk_freqcntrsts_show()
[all …]
/drivers/bluetooth/
Dhci_vhci.c36 struct sk_buff_head readq; member
51 skb_queue_purge(&data->readq); in vhci_close_dev()
60 skb_queue_purge(&data->readq); in vhci_flush()
72 skb_queue_tail(&data->readq, skb); in vhci_send_frame()
142 skb_queue_tail(&data->readq, skb); in __vhci_create_device()
261 skb = skb_dequeue(&data->readq); in vhci_read()
265 skb_queue_head(&data->readq, skb); in vhci_read()
277 !skb_queue_empty(&data->readq)); in vhci_read()
299 if (!skb_queue_empty(&data->readq)) in vhci_poll()
321 skb_queue_head_init(&data->readq); in vhci_open()
[all …]
/drivers/gpio/
Dgpio-mlxbf.c95 gs->csave_regs.scratchpad = readq(gs->base + MLXBF_GPIO_SCRATCHPAD); in mlxbf_gpio_suspend()
97 readq(gs->base + MLXBF_GPIO_PAD_CONTROL_FIRST_WORD); in mlxbf_gpio_suspend()
99 readq(gs->base + MLXBF_GPIO_PAD_CONTROL_1_FIRST_WORD); in mlxbf_gpio_suspend()
101 readq(gs->base + MLXBF_GPIO_PAD_CONTROL_2_FIRST_WORD); in mlxbf_gpio_suspend()
103 readq(gs->base + MLXBF_GPIO_PAD_CONTROL_3_FIRST_WORD); in mlxbf_gpio_suspend()
104 gs->csave_regs.pin_dir_i = readq(gs->base + MLXBF_GPIO_PIN_DIR_I); in mlxbf_gpio_suspend()
105 gs->csave_regs.pin_dir_o = readq(gs->base + MLXBF_GPIO_PIN_DIR_O); in mlxbf_gpio_suspend()
Dgpio-thunderx.c78 u64 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line)); in thunderx_gpio_is_gpio_nowarn()
171 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line)); in thunderx_gpio_get_direction()
200 orig_dat = ((readq(reg) >> bank_bit) & 1) ^ orig_invert; in thunderx_gpio_set_config()
201 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line)); in thunderx_gpio_set_config()
264 u64 read_bits = readq(txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_RX_DAT); in thunderx_gpio_get()
470 u64 c = readq(txgpio->register_base + GPIO_CONST); in thunderx_gpio_probe()
494 u64 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(i)); in thunderx_gpio_probe()
/drivers/net/ethernet/mellanox/mlxbf_gige/
Dmlxbf_gige_rx.c25 control = readq(base + MLXBF_GIGE_CONTROL); in mlxbf_gige_set_mac_rx_filter()
36 *dmac = readq(base + MLXBF_GIGE_RX_MAC_FILTER + in mlxbf_gige_get_mac_rx_filter()
47 control = readq(base + MLXBF_GIGE_CONTROL); in mlxbf_gige_enable_promisc()
65 control = readq(base + MLXBF_GIGE_CONTROL); in mlxbf_gige_disable_promisc()
135 data = readq(priv->base + MLXBF_GIGE_RX); in mlxbf_gige_rx_init()
151 data = readq(priv->base + MLXBF_GIGE_INT_MASK); in mlxbf_gige_rx_init()
156 data = readq(priv->base + MLXBF_GIGE_RX_DMA); in mlxbf_gige_rx_init()
187 data = readq(priv->base + MLXBF_GIGE_RX_DMA); in mlxbf_gige_rx_deinit()
230 rx_pi = readq(priv->base + MLXBF_GIGE_RX_WQE_PI); in mlxbf_gige_rx_packet()
274 rx_ci = readq(priv->base + MLXBF_GIGE_RX_CQE_PACKET_CI); in mlxbf_gige_rx_packet()
[all …]
Dmlxbf_gige_main.c97 p->rx_din_dropped_pkts += readq(priv->base + in mlxbf_gige_cache_stats()
99 p->rx_filter_passed_pkts += readq(priv->base + in mlxbf_gige_cache_stats()
101 p->rx_filter_discard_pkts += readq(priv->base + in mlxbf_gige_cache_stats()
112 control = readq(priv->base + MLXBF_GIGE_CONTROL); in mlxbf_gige_clean_port()
124 control = readq(priv->base + MLXBF_GIGE_CONTROL); in mlxbf_gige_clean_port()
140 control = readq(priv->base + MLXBF_GIGE_CONTROL); in mlxbf_gige_open()
253 readq(priv->base + MLXBF_GIGE_RX_DIN_DROP_COUNTER); in mlxbf_gige_get_stats64()
Dmlxbf_gige_ethtool.c110 readq(priv->base + MLXBF_GIGE_RX_DIN_DROP_COUNTER)); in mlxbf_gige_get_ethtool_stats()
113 readq(priv->base + MLXBF_GIGE_RX_PASS_COUNTER_ALL)); in mlxbf_gige_get_ethtool_stats()
115 readq(priv->base + MLXBF_GIGE_RX_DISC_COUNTER_ALL)); in mlxbf_gige_get_ethtool_stats()
/drivers/net/ethernet/neterion/vxge/
Dvxge-config.c38 val64 = readq(&vp_reg->rxmac_vcfg0); in vxge_hw_vpath_set_zero_rx_frm_len()
41 val64 = readq(&vp_reg->rxmac_vcfg0); in vxge_hw_vpath_set_zero_rx_frm_len()
64 val64 = readq(&vp_reg->prc_cfg6); in vxge_hw_vpath_wait_receive_idle()
74 rxd_count = readq(&vp_reg->prc_rxd_doorbell); in vxge_hw_vpath_wait_receive_idle()
79 val64 = readq(&vp_reg->frm_in_progress_cnt); in vxge_hw_vpath_wait_receive_idle()
127 val64 = readq(reg); in __vxge_hw_device_register_poll()
135 val64 = readq(reg); in __vxge_hw_device_register_poll()
207 val64 = readq(&vp_reg->rts_access_steer_ctrl); in vxge_hw_vpath_fw_api()
209 *data0 = readq(&vp_reg->rts_access_steer_data0); in vxge_hw_vpath_fw_api()
210 *data1 = readq(&vp_reg->rts_access_steer_data1); in vxge_hw_vpath_fw_api()
[all …]
Dvxge-traffic.c85 readq(&vp_reg->vpath_general_int_status); in vxge_hw_vpath_intr_enable()
231 val64 = readq(&vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]); in vxge_hw_vpath_tti_ci_set()
398 val64 = readq(&hldev->common_reg->titan_general_int_status); in vxge_hw_device_intr_enable()
611 alarm_status = readq(&vp_reg->vpath_general_int_status); in __vxge_hw_vpath_alarm_process()
635 val64 = readq(&vp_reg->xgmac_vp_int_status); in __vxge_hw_vpath_alarm_process()
640 val64 = readq(&vp_reg->asic_ntwk_vp_err_reg); in __vxge_hw_vpath_alarm_process()
696 pic_status = readq(&vp_reg->vpath_ppif_int_status); in __vxge_hw_vpath_alarm_process()
701 val64 = readq(&vp_reg->general_errors_reg); in __vxge_hw_vpath_alarm_process()
702 mask64 = readq(&vp_reg->general_errors_mask); in __vxge_hw_vpath_alarm_process()
749 val64 = readq(&vp_reg->kdfcctl_errors_reg); in __vxge_hw_vpath_alarm_process()
[all …]
/drivers/net/ethernet/netronome/nfp/
Dnfp_net_repr.c64 stats->tx_packets = readq(mem + NFP_MAC_STATS_TX_FRAMES_TRANSMITTED_OK); in nfp_repr_phy_port_get_stats64()
65 stats->tx_bytes = readq(mem + NFP_MAC_STATS_TX_OUT_OCTETS); in nfp_repr_phy_port_get_stats64()
66 stats->tx_dropped = readq(mem + NFP_MAC_STATS_TX_OUT_ERRORS); in nfp_repr_phy_port_get_stats64()
68 stats->rx_packets = readq(mem + NFP_MAC_STATS_RX_FRAMES_RECEIVED_OK); in nfp_repr_phy_port_get_stats64()
69 stats->rx_bytes = readq(mem + NFP_MAC_STATS_RX_IN_OCTETS); in nfp_repr_phy_port_get_stats64()
70 stats->rx_dropped = readq(mem + NFP_MAC_STATS_RX_IN_ERRORS); in nfp_repr_phy_port_get_stats64()
80 stats->tx_packets = readq(port->vnic + NFP_NET_CFG_STATS_RX_FRAMES); in nfp_repr_vnic_get_stats64()
81 stats->tx_bytes = readq(port->vnic + NFP_NET_CFG_STATS_RX_OCTETS); in nfp_repr_vnic_get_stats64()
82 stats->tx_dropped = readq(port->vnic + NFP_NET_CFG_STATS_RX_DISCARDS); in nfp_repr_vnic_get_stats64()
84 stats->rx_packets = readq(port->vnic + NFP_NET_CFG_STATS_TX_FRAMES); in nfp_repr_vnic_get_stats64()
[all …]
/drivers/crypto/marvell/octeontx/
Dotx_cptvf_main.c352 vqx_ctl.u = readq(cptvf->reg_base + OTX_CPT_VQX_CTL(0)); in cptvf_write_vq_ctl()
361 vqx_dbell.u = readq(cptvf->reg_base + OTX_CPT_VQX_DOORBELL(0)); in otx_cptvf_write_vq_doorbell()
370 vqx_inprg.u = readq(cptvf->reg_base + OTX_CPT_VQX_INPROG(0)); in cptvf_write_vq_inprog()
379 vqx_dwait.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0)); in cptvf_write_vq_done_numwait()
388 vqx_dwait.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0)); in cptvf_read_vq_done_numwait()
396 vqx_dwait.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0)); in cptvf_write_vq_done_timewait()
406 vqx_dwait.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0)); in cptvf_read_vq_done_timewait()
414 vqx_misc_ena.u = readq(cptvf->reg_base + OTX_CPT_VQX_MISC_ENA_W1S(0)); in cptvf_enable_swerr_interrupts()
424 vqx_misc_ena.u = readq(cptvf->reg_base + OTX_CPT_VQX_MISC_ENA_W1S(0)); in cptvf_enable_mbox_interrupts()
434 vqx_done_ena.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_ENA_W1S(0)); in cptvf_enable_done_interrupts()
[all …]
Dotx_cptpf_mbox.c117 pf_qx_ctl.u = readq(cpt->reg_base + OTX_CPT_PF_QX_CTL(vf)); in otx_cpt_cfg_qlen_for_vf()
130 pf_qx_ctl.u = readq(cpt->reg_base + OTX_CPT_PF_QX_CTL(vf)); in otx_cpt_cfg_vq_priority()
160 pf_qx_ctl.u = readq(cpt->reg_base + OTX_CPT_PF_QX_CTL(q)); in otx_cpt_bind_vq_to_grp()
187 mbx.msg = readq(cpt->reg_base + OTX_CPT_PF_VFX_MBOXX(vf, 0)); in otx_cpt_handle_mbox_intr()
188 mbx.data = readq(cpt->reg_base + OTX_CPT_PF_VFX_MBOXX(vf, 1)); in otx_cpt_handle_mbox_intr()
245 intr = readq(cpt->reg_base + OTX_CPT_PF_MBOX_INTX(0)); in otx_cpt_mbox_intr_handler()
/drivers/edac/
Dthunderx_edac.c265 sprintf(buf, "0x%016llx", readq(pdata->regs + _reg)); \
328 u64 lmc_int = readq(lmc->regs + LMC_INT); in thunderx_lmc_int_read()
355 readq(lmc->regs + LMC_CHAR_MASK0); in inject_ecc_fn()
356 readq(lmc->regs + LMC_CHAR_MASK2); in inject_ecc_fn()
357 readq(lmc->regs + LMC_ECC_PARITY_TEST); in inject_ecc_fn()
557 ctx->reg_int = readq(lmc->regs + LMC_INT); in thunderx_lmc_err_isr()
558 ctx->reg_fadr = readq(lmc->regs + LMC_FADR); in thunderx_lmc_err_isr()
559 ctx->reg_nxm_fadr = readq(lmc->regs + LMC_NXM_FADR); in thunderx_lmc_err_isr()
560 ctx->reg_scram_fadr = readq(lmc->regs + LMC_SCRAM_FADR); in thunderx_lmc_err_isr()
561 ctx->reg_ecc_synd = readq(lmc->regs + LMC_ECC_SYND); in thunderx_lmc_err_isr()
[all …]
/drivers/char/
Dhpet.c57 #define read_counter(MC) readq(MC)
124 #ifndef readq
125 static inline unsigned long long readq(void __iomem *addr) in readq() function
220 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> in hpet_timer_set_irq()
426 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), in hpet_release()
435 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { in hpet_release()
438 v = readq(&timer->hpet_config); in hpet_release()
520 v = readq(&timer->hpet_config); in hpet_ioctl_ieon()
603 v = readq(&timer->hpet_config); in hpet_ioctl_common()
619 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; in hpet_ioctl_common()
[all …]
/drivers/net/ethernet/neterion/
Ds2io.c1013 val64 = readq(&bar0->pci_mode); in s2io_verify_pci_mode()
1049 val64 = readq(&bar0->pci_mode); in s2io_print_pci_mode()
1214 val64 = readq(&bar0->sw_reset); in init_nic()
1221 val64 = readq(&bar0->sw_reset); in init_nic()
1228 val64 = readq(&bar0->adapter_status); in init_nic()
1239 val64 = readq(&bar0->mac_cfg); in init_nic()
1247 val64 = readq(&bar0->mac_int_mask); in init_nic()
1248 val64 = readq(&bar0->mc_int_mask); in init_nic()
1249 val64 = readq(&bar0->xgxs_int_mask); in init_nic()
1267 val64 = readq(&bar0->dtx_control); in init_nic()
[all …]
/drivers/spi/
Dspi-altera-dfl.c59 while ((readq(base + INDIRECT_ADDR) & INDIRECT_RD) && in indirect_bus_reg_read()
68 v = readq(base + INDIRECT_RD_DATA); in indirect_bus_reg_read()
85 while ((readq(base + INDIRECT_ADDR) & INDIRECT_WR) && in indirect_bus_reg_write()
111 v = readq(base + SPI_CORE_PARAMETER); in config_spi_master()
/drivers/mmc/host/
Dcavium.c169 emm_switch = readq(host->base + MIO_EMM_SWITCH(host)); in check_switch_errors()
219 rsp_sts = readq(host->base + MIO_EMM_RSP_STS(host)); in do_switch()
255 emm_switch = readq(slot->host->base + MIO_EMM_SWITCH(host)); in cvm_mmc_reset_bus()
260 wdog = readq(slot->host->base + MIO_EMM_WDOG(host)); in cvm_mmc_reset_bus()
282 old_slot->cached_switch = readq(host->base + MIO_EMM_SWITCH(host)); in cvm_mmc_switch_to()
283 old_slot->cached_rca = readq(host->base + MIO_EMM_RCA(host)); in cvm_mmc_switch_to()
317 dat = readq(host->base + MIO_EMM_BUF_DAT(host)); in do_read()
348 rsp_lo = readq(host->base + MIO_EMM_RSP_LO(host)); in set_cmd_response()
361 rsp_hi = readq(host->base + MIO_EMM_RSP_HI(host)); in set_cmd_response()
387 fifo_cfg = readq(host->dma_base + MIO_EMM_DMA_FIFO_CFG(host)); in finish_dma_sg()
[all …]
/drivers/net/ethernet/cavium/common/
Dcavium_ptp.c48 ret = CLOCK_BASE_RATE * ((readq(base + RST_BOOT) >> 33) & 0x3f); in ptp_cavium_clock_get()
217 return readq(clock->reg_base + PTP_CLOCK_HI); in cavium_ptp_cc_read()
275 clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG); in cavium_ptp_probe()
292 clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG); in cavium_ptp_probe()
321 clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG); in cavium_ptp_remove()
/drivers/net/ethernet/marvell/octeontx2/af/
Dptp.c66 cfg = readq(base + RST_BOOT); in get_clock_rate()
145 *clk = readq(ptp->reg_base + PTP_CLOCK_HI); in ptp_get_clock()
180 clock_cfg = readq(ptp->reg_base + PTP_CLOCK_CFG); in ptp_probe()
220 clock_cfg = readq(ptp->reg_base + PTP_CLOCK_CFG); in ptp_remove()
/drivers/rpmsg/
Drpmsg_char.c69 wait_queue_head_t readq; member
87 wake_up_interruptible(&eptdev->readq); in rpmsg_chrdev_eptdev_destroy()
113 wake_up_interruptible(&eptdev->readq); in rpmsg_ept_copy_cb()
139 wake_up_interruptible(&eptdev->readq); in rpmsg_ept_no_copy_cb()
236 if (wait_event_interruptible(eptdev->readq, in rpmsg_eptdev_read_iter()
320 poll_wait(filp, &eptdev->readq, wait); in rpmsg_eptdev_poll()
416 init_waitqueue_head(&eptdev->readq); in rpmsg_chrdev_eptdev_alloc()
/drivers/char/ipmi/
Dipmi_si_mem_io.c44 #ifdef readq
47 return (readq((io->addr)+(offset * io->regspacing)) >> io->regshift) in mem_inq()
101 #ifdef readq in ipmi_si_mem_setup()

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