/drivers/gpu/drm/sun4i/ |
D | sun4i_hdmi.h | 271 struct regmap_field *field_ddc_en; 272 struct regmap_field *field_ddc_start; 273 struct regmap_field *field_ddc_reset; 274 struct regmap_field *field_ddc_addr_reg; 275 struct regmap_field *field_ddc_slave_addr; 276 struct regmap_field *field_ddc_int_mask; 277 struct regmap_field *field_ddc_int_status; 278 struct regmap_field *field_ddc_fifo_clear; 279 struct regmap_field *field_ddc_fifo_rx_thres; 280 struct regmap_field *field_ddc_fifo_tx_thres; [all …]
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D | sun4i_hdmi_ddc_clk.c | 17 struct regmap_field *reg;
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/drivers/thermal/st/ |
D | st_thermal.h | 85 struct regmap_field *pwr; 86 struct regmap_field *dcorrect; 87 struct regmap_field *overflow; 88 struct regmap_field *temp_data; 89 struct regmap_field *int_thresh_hi; 90 struct regmap_field *int_enable;
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/drivers/phy/ti/ |
D | phy-j721e-wiz.c | 151 struct regmap_field *field; 160 struct regmap_field *field; 181 struct regmap_field *phy_en_refclk; 265 struct regmap_field *por_en; 266 struct regmap_field *phy_reset_n; 267 struct regmap_field *phy_en_refclk; 268 struct regmap_field *p_enable[WIZ_MAX_LANES]; 269 struct regmap_field *p_align[WIZ_MAX_LANES]; 270 struct regmap_field *p_raw_auto_start[WIZ_MAX_LANES]; 271 struct regmap_field *p_standard_mode[WIZ_MAX_LANES]; [all …]
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D | phy-gmii-sel.c | 38 struct regmap_field *fields[PHY_GMII_SEL_LAST]; 63 struct regmap_field *regfield; in phy_gmii_sel_mode() 254 struct regmap_field *regfield; in phy_gmii_init_phy()
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/drivers/net/dsa/xrs700x/ |
D | xrs700x.h | 32 struct regmap_field *ps_forward; 33 struct regmap_field *ps_management; 34 struct regmap_field *ps_sel_speed; 35 struct regmap_field *ps_cur_speed;
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/drivers/phy/cadence/ |
D | phy-cadence-sierra.c | 204 struct regmap_field *pfdclk_sel_preg; 205 struct regmap_field *plllc1en_field; 206 struct regmap_field *termen_field; 266 struct regmap_field *macro_id_type; 267 struct regmap_field *phy_pll_cfg_1; 268 struct regmap_field *pllctrl_lock[SIERRA_MAX_LANES]; 269 struct regmap_field *cmn_refrcv_refclk_plllc1en_preg[SIERRA_NUM_CMN_PLLC]; 270 struct regmap_field *cmn_refrcv_refclk_termen_preg[SIERRA_NUM_CMN_PLLC]; 271 struct regmap_field *cmn_plllc_pfdclk1_sel_preg[SIERRA_NUM_CMN_PLLC]; 442 struct regmap_field *plllc1en_field = mux->plllc1en_field; in cdns_sierra_pll_mux_get_parent() [all …]
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/drivers/usb/isp1760/ |
D | isp1760-core.h | 59 static inline u32 isp1760_field_read(struct regmap_field **fields, u32 field) in isp1760_field_read() 68 static inline void isp1760_field_write(struct regmap_field **fields, u32 field, in isp1760_field_write() 74 static inline void isp1760_field_set(struct regmap_field **fields, u32 field) in isp1760_field_set() 79 static inline void isp1760_field_clear(struct regmap_field **fields, u32 field) in isp1760_field_clear()
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D | isp1760-udc.h | 72 struct regmap_field *fields[DC_FIELD_MAX];
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D | isp1760-hcd.h | 53 struct regmap_field *fields[HC_FIELD_MAX];
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/drivers/cpufreq/ |
D | sti-cpufreq.c | 111 struct regmap_field *regmap_field; in sti_cpufreq_fetch_regmap_field() local 118 regmap_field = devm_regmap_field_alloc(dev, in sti_cpufreq_fetch_regmap_field() 121 if (IS_ERR(regmap_field)) { in sti_cpufreq_fetch_regmap_field() 123 return PTR_ERR(regmap_field); in sti_cpufreq_fetch_regmap_field() 126 ret = regmap_field_read(regmap_field, &value); in sti_cpufreq_fetch_regmap_field()
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/drivers/clk/mstar/ |
D | clk-msc313-mpll.c | 35 struct regmap_field *input_div; 36 struct regmap_field *loop_div_first; 37 struct regmap_field *loop_div_second; 38 struct regmap_field *output_div;
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/drivers/iio/light/ |
D | stk3310.c | 111 struct regmap_field *reg_state; 112 struct regmap_field *reg_als_gain; 113 struct regmap_field *reg_ps_gain; 114 struct regmap_field *reg_als_it; 115 struct regmap_field *reg_ps_it; 116 struct regmap_field *reg_int_ps; 117 struct regmap_field *reg_flag_psint; 118 struct regmap_field *reg_flag_nf;
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D | apds9960.c | 127 struct regmap_field *reg_int_als; 128 struct regmap_field *reg_int_ges; 129 struct regmap_field *reg_int_pxs; 131 struct regmap_field *reg_enable_als; 132 struct regmap_field *reg_enable_ges; 133 struct regmap_field *reg_enable_pxs;
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D | ltr501.c | 159 struct regmap_field *reg_it; 160 struct regmap_field *reg_als_intr; 161 struct regmap_field *reg_ps_intr; 162 struct regmap_field *reg_als_rate; 163 struct regmap_field *reg_ps_rate; 164 struct regmap_field *reg_als_prst; 165 struct regmap_field *reg_ps_prst;
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/drivers/reset/sti/ |
D | reset-syscfg.c | 26 struct regmap_field *reset; 27 struct regmap_field *ack; 163 struct regmap_field *f; in syscfg_reset_controller_register()
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/drivers/pinctrl/ |
D | pinctrl-st.c | 214 struct regmap_field *rt[ST_GPIO_PINS_PER_BANK]; 218 struct regmap_field *clk1notclk0; 219 struct regmap_field *delay_0; 220 struct regmap_field *delay_1; 221 struct regmap_field *invertclk; 222 struct regmap_field *retime; 223 struct regmap_field *clknotdata; 224 struct regmap_field *double_edge; 229 struct regmap_field *alt, *oe, *pu, *od; 386 struct regmap_field *output_enable = pc->oe; in st_pinconf_set_config() [all …]
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/drivers/pwm/ |
D | pwm-sti.c | 91 struct regmap_field *prescale_low; 92 struct regmap_field *prescale_high; 93 struct regmap_field *pwm_out_en; 94 struct regmap_field *pwm_cpt_en; 95 struct regmap_field *pwm_cpt_int_en; 96 struct regmap_field *pwm_cpt_int_stat;
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/drivers/net/ethernet/stmicro/stmmac/ |
D | dwmac-sun8i.c | 76 struct regmap_field *regmap_field; member 874 regmap_field_read(gmac->regmap_field, ®); in mdio_mux_syscon_switch_fn() 891 regmap_field_write(gmac->regmap_field, val); in mdio_mux_syscon_switch_fn() 931 ret = regmap_field_read(gmac->regmap_field, &val); in sun8i_dwmac_set_syscon() 1028 regmap_field_write(gmac->regmap_field, reg); in sun8i_dwmac_set_syscon() 1037 regmap_field_write(gmac->regmap_field, reg); in sun8i_dwmac_unset_syscon() 1213 gmac->regmap_field = devm_regmap_field_alloc(dev, regmap, in sun8i_dwmac_probe() 1215 if (IS_ERR(gmac->regmap_field)) { in sun8i_dwmac_probe() 1216 ret = PTR_ERR(gmac->regmap_field); in sun8i_dwmac_probe()
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/drivers/mux/ |
D | mmio.c | 20 struct regmap_field **fields = mux_chip_priv(mux->chip); in mux_mmio_set() 40 struct regmap_field **fields; in mux_mmio_probe()
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/drivers/hwspinlock/ |
D | qcom_hwspinlock.c | 24 struct regmap_field *field = lock->priv; in qcom_hwspinlock_trylock() 41 struct regmap_field *field = lock->priv; in qcom_hwspinlock_unlock()
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/drivers/base/regmap/ |
D | regmap.c | 1275 static void regmap_field_init(struct regmap_field *rm_field, in regmap_field_init() 1297 struct regmap_field *devm_regmap_field_alloc(struct device *dev, in devm_regmap_field_alloc() 1300 struct regmap_field *rm_field = devm_kzalloc(dev, in devm_regmap_field_alloc() 1326 struct regmap_field **rm_field, in regmap_field_bulk_alloc() 1330 struct regmap_field *rf; in regmap_field_bulk_alloc() 1362 struct regmap_field **rm_field, in devm_regmap_field_bulk_alloc() 1366 struct regmap_field *rf; in devm_regmap_field_bulk_alloc() 1388 void regmap_field_bulk_free(struct regmap_field *field) in regmap_field_bulk_free() 1406 struct regmap_field *field) in devm_regmap_field_bulk_free() 1424 struct regmap_field *field) in devm_regmap_field_free() [all …]
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/drivers/regulator/ |
D | da9063-regulator.c | 147 struct regmap_field *mode; 148 struct regmap_field *suspend; 149 struct regmap_field *sleep; 150 struct regmap_field *suspend_sleep;
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D | da9062-regulator.c | 65 struct regmap_field *mode; 66 struct regmap_field *suspend; 67 struct regmap_field *sleep; 68 struct regmap_field *suspend_sleep;
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/drivers/power/supply/ |
D | bd99954-charger.c | 108 struct regmap_field *rmap_fields[F_MAX_FIELDS]; 448 struct regmap_field *id; in bd9995x_get_chip_state() 543 struct regmap_field *sub_mask_f[] = { in bd9995x_irq_handler_thread()
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