Home
last modified time | relevance | path

Searched refs:regoffset (Results 1 – 18 of 18) sorted by relevance

/drivers/gpu/drm/radeon/
Dsumo_smc.c165 u32 regoffset = 0; in sumo_set_tdp_limit() local
172 regoffset = RCU_SclkDpmTdpLimit01; in sumo_set_tdp_limit()
176 regoffset = RCU_SclkDpmTdpLimit01; in sumo_set_tdp_limit()
180 regoffset = RCU_SclkDpmTdpLimit23; in sumo_set_tdp_limit()
184 regoffset = RCU_SclkDpmTdpLimit23; in sumo_set_tdp_limit()
188 regoffset = RCU_SclkDpmTdpLimit47; in sumo_set_tdp_limit()
192 regoffset = RCU_SclkDpmTdpLimit47; in sumo_set_tdp_limit()
199 sclk_dpm_tdp_limit = RREG32_RCU(regoffset); in sumo_set_tdp_limit()
202 WREG32_RCU(regoffset, sclk_dpm_tdp_limit); in sumo_set_tdp_limit()
/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/
Drf.c298 u16 regoffset; in _rtl92c_write_ofdm_power_reg() local
311 regoffset = regoffset_a[index]; in _rtl92c_write_ofdm_power_reg()
313 regoffset = regoffset_b[index]; in _rtl92c_write_ofdm_power_reg()
314 rtl_set_bbreg(hw, regoffset, MASKDWORD, writeval); in _rtl92c_write_ofdm_power_reg()
316 "Set 0x%x = %08x\n", regoffset, writeval); in _rtl92c_write_ofdm_power_reg()
318 (regoffset == RTXAGC_A_MCS15_MCS12 || in _rtl92c_write_ofdm_power_reg()
319 regoffset == RTXAGC_B_MCS15_MCS12)) || in _rtl92c_write_ofdm_power_reg()
321 (regoffset == RTXAGC_A_MCS07_MCS04 || in _rtl92c_write_ofdm_power_reg()
322 regoffset == RTXAGC_B_MCS07_MCS04))) { in _rtl92c_write_ofdm_power_reg()
324 if (regoffset == RTXAGC_A_MCS15_MCS12 || in _rtl92c_write_ofdm_power_reg()
[all …]
/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/
Drf.c324 u16 regoffset; in _rtl92c_write_ofdm_power_reg() local
339 regoffset = regoffset_a[index]; in _rtl92c_write_ofdm_power_reg()
341 regoffset = regoffset_b[index]; in _rtl92c_write_ofdm_power_reg()
342 rtl_set_bbreg(hw, regoffset, MASKDWORD, writeval); in _rtl92c_write_ofdm_power_reg()
345 "Set 0x%x = %08x\n", regoffset, writeval); in _rtl92c_write_ofdm_power_reg()
348 (regoffset == RTXAGC_A_MCS15_MCS12 || in _rtl92c_write_ofdm_power_reg()
349 regoffset == RTXAGC_B_MCS15_MCS12)) || in _rtl92c_write_ofdm_power_reg()
351 (regoffset == RTXAGC_A_MCS07_MCS04 || in _rtl92c_write_ofdm_power_reg()
352 regoffset == RTXAGC_B_MCS07_MCS04))) { in _rtl92c_write_ofdm_power_reg()
355 if (regoffset == RTXAGC_A_MCS15_MCS12 || in _rtl92c_write_ofdm_power_reg()
[all …]
/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
Drf.c336 u16 regoffset; in _rtl8723e_write_ofdm_power_reg() local
351 regoffset = regoffset_a[index]; in _rtl8723e_write_ofdm_power_reg()
353 regoffset = regoffset_b[index]; in _rtl8723e_write_ofdm_power_reg()
354 rtl_set_bbreg(hw, regoffset, MASKDWORD, writeval); in _rtl8723e_write_ofdm_power_reg()
357 "Set 0x%x = %08x\n", regoffset, writeval); in _rtl8723e_write_ofdm_power_reg()
360 (regoffset == RTXAGC_A_MCS15_MCS12 || in _rtl8723e_write_ofdm_power_reg()
361 regoffset == RTXAGC_B_MCS15_MCS12)) || in _rtl8723e_write_ofdm_power_reg()
363 (regoffset == RTXAGC_A_MCS07_MCS04 || in _rtl8723e_write_ofdm_power_reg()
364 regoffset == RTXAGC_B_MCS07_MCS04))) { in _rtl8723e_write_ofdm_power_reg()
367 if (regoffset == RTXAGC_A_MCS15_MCS12 || in _rtl8723e_write_ofdm_power_reg()
[all …]
/drivers/staging/r8188eu/hal/
Drtl8188e_rf6052.c359 u16 regoffset; in writeOFDMPowerReg88E() local
371 regoffset = regoffset_a[index]; in writeOFDMPowerReg88E()
373 regoffset = regoffset_b[index]; in writeOFDMPowerReg88E()
375 PHY_SetBBReg(Adapter, regoffset, bMaskDWord, writeVal); in writeOFDMPowerReg88E()
379 (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_B_Mcs15_Mcs12)) || in writeOFDMPowerReg88E()
381 (regoffset == rTxAGC_A_Mcs07_Mcs04 || regoffset == rTxAGC_B_Mcs07_Mcs04))) { in writeOFDMPowerReg88E()
383 if (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_A_Mcs07_Mcs04) in writeOFDMPowerReg88E()
384 regoffset = 0xc90; in writeOFDMPowerReg88E()
385 if (regoffset == rTxAGC_B_Mcs15_Mcs12 || regoffset == rTxAGC_B_Mcs07_Mcs04) in writeOFDMPowerReg88E()
386 regoffset = 0xc98; in writeOFDMPowerReg88E()
[all …]
/drivers/gpio/
Dgpio-tc3589x.c162 int regoffset = offset / 8; in tc3589x_gpio_irq_set_type() local
166 tc3589x_gpio->regs[REG_IBE][regoffset] |= mask; in tc3589x_gpio_irq_set_type()
170 tc3589x_gpio->regs[REG_IBE][regoffset] &= ~mask; in tc3589x_gpio_irq_set_type()
173 tc3589x_gpio->regs[REG_IS][regoffset] |= mask; in tc3589x_gpio_irq_set_type()
175 tc3589x_gpio->regs[REG_IS][regoffset] &= ~mask; in tc3589x_gpio_irq_set_type()
178 tc3589x_gpio->regs[REG_IEV][regoffset] |= mask; in tc3589x_gpio_irq_set_type()
180 tc3589x_gpio->regs[REG_IEV][regoffset] &= ~mask; in tc3589x_gpio_irq_set_type()
228 int regoffset = offset / 8; in tc3589x_gpio_irq_mask() local
231 tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask; in tc3589x_gpio_irq_mask()
232 tc3589x_gpio->regs[REG_DIRECT][regoffset] |= mask; in tc3589x_gpio_irq_mask()
[all …]
Dgpio-stmpe.c145 int regoffset = offset / 8; in stmpe_gpio_irq_set_type() local
157 stmpe_gpio->regs[REG_RE][regoffset] |= mask; in stmpe_gpio_irq_set_type()
159 stmpe_gpio->regs[REG_RE][regoffset] &= ~mask; in stmpe_gpio_irq_set_type()
162 stmpe_gpio->regs[REG_FE][regoffset] |= mask; in stmpe_gpio_irq_set_type()
164 stmpe_gpio->regs[REG_FE][regoffset] &= ~mask; in stmpe_gpio_irq_set_type()
233 int regoffset = offset / 8; in stmpe_gpio_irq_mask() local
236 stmpe_gpio->regs[REG_IE][regoffset] &= ~mask; in stmpe_gpio_irq_mask()
244 int regoffset = offset / 8; in stmpe_gpio_irq_unmask() local
247 stmpe_gpio->regs[REG_IE][regoffset] |= mask; in stmpe_gpio_irq_unmask()
/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Drf.c320 u16 regoffset; in _rtl92d_write_ofdm_power_reg() local
333 regoffset = regoffset_a[index]; in _rtl92d_write_ofdm_power_reg()
335 regoffset = regoffset_b[index]; in _rtl92d_write_ofdm_power_reg()
336 rtl_set_bbreg(hw, regoffset, MASKDWORD, writeval); in _rtl92d_write_ofdm_power_reg()
338 "Set 0x%x = %08x\n", regoffset, writeval); in _rtl92d_write_ofdm_power_reg()
340 (regoffset == RTXAGC_A_MCS15_MCS12 || in _rtl92d_write_ofdm_power_reg()
341 regoffset == RTXAGC_B_MCS15_MCS12)) || in _rtl92d_write_ofdm_power_reg()
343 (regoffset == RTXAGC_A_MCS07_MCS04 || in _rtl92d_write_ofdm_power_reg()
344 regoffset == RTXAGC_B_MCS07_MCS04))) { in _rtl92d_write_ofdm_power_reg()
346 if (regoffset == RTXAGC_A_MCS15_MCS12 || in _rtl92d_write_ofdm_power_reg()
[all …]
/drivers/gpu/drm/nouveau/dispnv04/
Ddac.c242 uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder); in nv17_dac_sample_load() local
260 saved_rtest_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv17_dac_sample_load()
261 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, in nv17_dac_sample_load()
267 if (regoffset == 0x68) { in nv17_dac_sample_load()
281 saved_routput = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset); in nv17_dac_sample_load()
298 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, routput); in nv17_dac_sample_load()
301 temp = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset); in nv17_dac_sample_load()
302 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, temp | 1); in nv17_dac_sample_load()
311 sample = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv17_dac_sample_load()
313 sample &= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv17_dac_sample_load()
[all …]
Dtvnv17.c50 uint32_t testval, regoffset = nv04_dac_output_offset(encoder); in nv42_tv_sample_load() local
61 dacclk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset); in nv42_tv_sample_load()
71 test_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv42_tv_sample_load()
90 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, 0); in nv42_tv_sample_load()
92 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, in nv42_tv_sample_load()
95 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, in nv42_tv_sample_load()
104 sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset) in nv42_tv_sample_load()
110 sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset) in nv42_tv_sample_load()
117 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, dacclk); in nv42_tv_sample_load()
118 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, test_ctrl); in nv42_tv_sample_load()
/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
Drf.c319 u16 regoffset; in _rtl8821ae_write_ofdm_power_reg() local
334 regoffset = regoffset_a[index]; in _rtl8821ae_write_ofdm_power_reg()
336 regoffset = regoffset_b[index]; in _rtl8821ae_write_ofdm_power_reg()
337 rtl_set_bbreg(hw, regoffset, MASKDWORD, writeval); in _rtl8821ae_write_ofdm_power_reg()
340 "Set 0x%x = %08x\n", regoffset, writeval); in _rtl8821ae_write_ofdm_power_reg()
/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
Drf.c342 u16 regoffset; in _rtl8723be_write_ofdm_power_reg() local
357 regoffset = regoffset_a[index]; in _rtl8723be_write_ofdm_power_reg()
359 regoffset = regoffset_b[index]; in _rtl8723be_write_ofdm_power_reg()
360 rtl_set_bbreg(hw, regoffset, MASKDWORD, writeval); in _rtl8723be_write_ofdm_power_reg()
363 "Set 0x%x = %08x\n", regoffset, writeval); in _rtl8723be_write_ofdm_power_reg()
/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
Drf.c339 u16 regoffset; in _rtl88e_write_ofdm_power_reg() local
354 regoffset = regoffset_a[index]; in _rtl88e_write_ofdm_power_reg()
356 regoffset = regoffset_b[index]; in _rtl88e_write_ofdm_power_reg()
357 rtl_set_bbreg(hw, regoffset, MASKDWORD, writeval); in _rtl88e_write_ofdm_power_reg()
360 "Set 0x%x = %08x\n", regoffset, writeval); in _rtl88e_write_ofdm_power_reg()
/drivers/mfd/
Dstmpe.c294 int regoffset = numregs - (pin / afperreg) - 1; in stmpe_set_altfunc() local
297 regs[regoffset] &= ~(mask << pos); in stmpe_set_altfunc()
298 regs[regoffset] |= af << pos; in stmpe_set_altfunc()
1170 int regoffset = offset / 8; in stmpe_irq_mask() local
1173 stmpe->ier[regoffset] &= ~mask; in stmpe_irq_mask()
1180 int regoffset = offset / 8; in stmpe_irq_unmask() local
1183 stmpe->ier[regoffset] |= mask; in stmpe_irq_unmask()
/drivers/pinctrl/spear/
Dpinctrl-spear1340.c1976 unsigned int regoffset, regindex, bitoffset; in gpio_request_endisable() local
1986 regoffset = PAD_FUNCTION_EN_1 + regindex * sizeof(int *); in gpio_request_endisable()
1988 regoffset = PAD_FUNCTION_EN_5 + (regindex - 4) * sizeof(int *); in gpio_request_endisable()
1990 val = pmx_readl(pmx, regoffset); in gpio_request_endisable()
1996 pmx_writel(pmx, val, regoffset); in gpio_request_endisable()
/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
Drf.c292 u16 regoffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c}; in _rtl92s_write_ofdm_powerreg() local
340 rtl_set_bbreg(hw, regoffset[index], 0x7f7f7f7f, writeval); in _rtl92s_write_ofdm_powerreg()
/drivers/video/fbdev/
Dcirrusfb.c278 u32 regoffset; /* Offset of registers in first Zorro device */ member
308 .regoffset = 0x00600000,
315 .regoffset = 0x10000,
2213 regbase = zorro_resource_start(z) + zcl->regoffset; in cirrusfb_zorro_register()
/drivers/gpu/drm/msm/adreno/
Da5xx_gpu.c1471 u32 regoffset; member
1623 u32 o = a5xx_hlsq_aperture_regs[i].regoffset; in a5xx_show()