| /drivers/reset/ |
| D | Makefile | 6 obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
7 obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
8 obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
9 obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
10 obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
11 obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
12 obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
13 obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
14 obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
15 obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o
[all …]
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| D | Kconfig | 11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
22 This option enables support for the external reset functions for
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
36 This enables the reset controller driver for AXS10x.
43 This enables the reset controller driver for BCM6345 SoCs.
50 This enables the reset controller driver for Marvell Berlin SoCs.
53 tristate "Broadcom STB reset controller"
57 This enables the reset controller driver for Broadcom STB SoCs using
[all …]
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| /drivers/power/reset/ |
| D | at91-reset.c | 70 struct at91_reset *reset = container_of(this, struct at91_reset, nb); in at91_reset() local
93 : "r" (reset->ramc_base[0]), in at91_reset()
94 "r" (reset->ramc_base[1]), in at91_reset()
95 "r" (reset->rstc_base), in at91_reset()
98 "r" (reset->args), in at91_reset()
99 "r" (reset->ramc_lpr) in at91_reset()
187 struct at91_reset *reset; in at91_reset_probe() local
191 reset = devm_kzalloc(&pdev->dev, sizeof(*reset), GFP_KERNEL); in at91_reset_probe()
192 if (!reset) in at91_reset_probe()
195 reset->rstc_base = devm_of_iomap(&pdev->dev, pdev->dev.of_node, 0, NULL); in at91_reset_probe()
[all …]
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| /drivers/soc/ti/ |
| D | omap_prm.c | 723 static bool _is_valid_reset(struct omap_reset_data *reset, unsigned long id) in _is_valid_reset() argument
725 if (reset->mask & BIT(id)) in _is_valid_reset()
731 static int omap_reset_get_st_bit(struct omap_reset_data *reset, in omap_reset_get_st_bit() argument
734 const struct omap_rst_map *map = reset->prm->data->rstmap; in omap_reset_get_st_bit()
749 struct omap_reset_data *reset = to_omap_reset_data(rcdev); in omap_reset_status() local
751 int st_bit = omap_reset_get_st_bit(reset, id); in omap_reset_status()
752 bool has_rstst = reset->prm->data->rstst || in omap_reset_status()
753 (reset->prm->data->flags & OMAP_PRM_HAS_RSTST); in omap_reset_status()
760 v = readl_relaxed(reset->prm->base + reset->prm->data->rstctrl); in omap_reset_status()
768 v = readl_relaxed(reset->prm->base + reset->prm->data->rstst); in omap_reset_status()
[all …]
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| /drivers/clk/actions/ |
| D | owl-reset.c | 17 struct owl_reset *reset = to_owl_reset(rcdev); in owl_reset_assert() local
18 const struct owl_reset_map *map = &reset->reset_map[id]; in owl_reset_assert()
20 return regmap_update_bits(reset->regmap, map->reg, map->bit, 0); in owl_reset_assert()
26 struct owl_reset *reset = to_owl_reset(rcdev); in owl_reset_deassert() local
27 const struct owl_reset_map *map = &reset->reset_map[id]; in owl_reset_deassert()
29 return regmap_update_bits(reset->regmap, map->reg, map->bit, map->bit); in owl_reset_deassert()
45 struct owl_reset *reset = to_owl_reset(rcdev); in owl_reset_status() local
46 const struct owl_reset_map *map = &reset->reset_map[id]; in owl_reset_status()
50 ret = regmap_read(reset->regmap, map->reg, ®); in owl_reset_status()
64 .reset = owl_reset_reset,
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| /drivers/gpu/drm/i915/selftests/ |
| D | igt_reset.c | 19 pr_debug("%s: current gpu_error=%08lx\n", __func__, gt->reset.flags); in igt_global_reset_lock()
21 while (test_and_set_bit(I915_RESET_BACKOFF, >->reset.flags)) in igt_global_reset_lock()
22 wait_event(gt->reset.queue, in igt_global_reset_lock()
23 !test_bit(I915_RESET_BACKOFF, >->reset.flags)); in igt_global_reset_lock()
27 >->reset.flags)) in igt_global_reset_lock()
28 wait_on_bit(>->reset.flags, I915_RESET_ENGINE + id, in igt_global_reset_lock()
39 clear_bit(I915_RESET_ENGINE + id, >->reset.flags); in igt_global_reset_unlock()
41 clear_bit(I915_RESET_BACKOFF, >->reset.flags); in igt_global_reset_unlock()
42 wake_up_all(>->reset.queue); in igt_global_reset_unlock()
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| /drivers/gpu/drm/i915/gt/ |
| D | intel_reset.c | 724 reset_func reset; in __intel_gt_reset() local
728 reset = intel_get_gpu_reset(gt); in __intel_gt_reset()
729 if (!reset) in __intel_gt_reset()
740 ret = reset(gt, engine_mask, retry); in __intel_gt_reset()
750 if (!gt->i915->params.reset) in intel_has_gpu_reset()
758 if (gt->i915->params.reset < 2) in intel_has_reset_engine()
793 if (engine->reset.prepare) in reset_prepare_engine()
794 engine->reset.prepare(engine); in reset_prepare_engine()
878 if (engine->reset.finish) in reset_finish_engine()
879 engine->reset.finish(engine); in reset_finish_engine()
[all …]
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| /drivers/video/backlight/ |
| D | lms283gf05.c | 21 struct gpio_desc *reset; member
130 if (st->reset) in lms283gf05_power_set()
131 lms283gf05_reset(st->reset); in lms283gf05_power_set()
135 if (st->reset) in lms283gf05_power_set()
136 gpiod_set_value(st->reset, 1); /* Asserted */ in lms283gf05_power_set()
157 st->reset = gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW); in lms283gf05_probe()
158 if (IS_ERR(st->reset)) in lms283gf05_probe()
159 return PTR_ERR(st->reset); in lms283gf05_probe()
160 gpiod_set_consumer_name(st->reset, "LMS283GF05 RESET"); in lms283gf05_probe()
173 if (st->reset) in lms283gf05_probe()
[all …]
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| /drivers/clk/sunxi-ng/ |
| D | ccu_common.c | 20 struct ccu_reset reset; member
92 struct ccu_reset *reset; in sunxi_ccu_probe() local
130 reset = &ccu->reset; in sunxi_ccu_probe()
131 reset->rcdev.of_node = node; in sunxi_ccu_probe()
132 reset->rcdev.ops = &ccu_reset_ops; in sunxi_ccu_probe()
133 reset->rcdev.owner = dev ? dev->driver->owner : THIS_MODULE; in sunxi_ccu_probe()
134 reset->rcdev.nr_resets = desc->num_resets; in sunxi_ccu_probe()
135 reset->base = reg; in sunxi_ccu_probe()
136 reset->lock = &ccu_lock; in sunxi_ccu_probe()
137 reset->reset_map = desc->resets; in sunxi_ccu_probe()
[all …]
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| /drivers/clk/bcm/ |
| D | clk-bcm2711-dvp.c | 18 struct reset_simple_data reset; member
48 dvp->reset.rcdev.owner = THIS_MODULE; in clk_dvp_probe()
49 dvp->reset.rcdev.nr_resets = NR_RESETS; in clk_dvp_probe()
50 dvp->reset.rcdev.ops = &reset_simple_ops; in clk_dvp_probe()
51 dvp->reset.rcdev.of_node = pdev->dev.of_node; in clk_dvp_probe()
52 dvp->reset.membase = base + DVP_HT_RPI_SW_INIT; in clk_dvp_probe()
53 spin_lock_init(&dvp->reset.lock); in clk_dvp_probe()
55 ret = devm_reset_controller_register(&pdev->dev, &dvp->reset.rcdev); in clk_dvp_probe()
64 &dvp->reset.lock); in clk_dvp_probe()
73 &dvp->reset.lock); in clk_dvp_probe()
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| /drivers/watchdog/ |
| D | mena21_wdt.c | 44 int reset = 0; in a21_wdt_get_bootstatus() local
46 reset |= gpiod_get_value(drv->gpios[GPIO_WD_RST0]) ? (1 << 0) : 0; in a21_wdt_get_bootstatus()
47 reset |= gpiod_get_value(drv->gpios[GPIO_WD_RST1]) ? (1 << 1) : 0; in a21_wdt_get_bootstatus()
48 reset |= gpiod_get_value(drv->gpios[GPIO_WD_RST2]) ? (1 << 2) : 0; in a21_wdt_get_bootstatus()
50 return reset; in a21_wdt_get_bootstatus()
132 unsigned int reset = 0; in a21_wdt_probe() local
179 reset = a21_wdt_get_bootstatus(drv); in a21_wdt_probe()
180 if (reset == 2) in a21_wdt_probe()
182 else if (reset == 4) in a21_wdt_probe()
184 else if (reset == 5) in a21_wdt_probe()
[all …]
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| /drivers/misc/ |
| D | gehc-achc.c | 23 struct gpio_desc *reset; member
51 static void ezport_reset(struct gpio_desc *reset) in ezport_reset() argument
53 gpiod_set_value(reset, 1); in ezport_reset()
55 gpiod_set_value(reset, 0); in ezport_reset()
59 static int ezport_start_programming(struct spi_device *spi, struct gpio_desc *reset) in ezport_start_programming() argument
80 ezport_reset(reset); in ezport_start_programming()
92 static void ezport_stop_programming(struct spi_device *spi, struct gpio_desc *reset) in ezport_stop_programming() argument
96 ezport_reset(reset); in ezport_stop_programming()
414 static int ezport_flash(struct spi_device *spi, struct gpio_desc *reset, const char *fwname) in ezport_flash() argument
418 ret = ezport_start_programming(spi, reset); in ezport_flash()
[all …]
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| /drivers/phy/qualcomm/ |
| D | phy-ath79-usb.c | 14 struct reset_control *reset; member
32 err = reset_control_deassert(priv->reset); in ath79_usb_phy_power_on()
44 err = reset_control_assert(priv->reset); in ath79_usb_phy_power_off()
51 reset_control_deassert(priv->reset); in ath79_usb_phy_power_off()
72 priv->reset = devm_reset_control_get(&pdev->dev, "phy"); in ath79_usb_phy_probe()
73 if (IS_ERR(priv->reset)) in ath79_usb_phy_probe()
74 return PTR_ERR(priv->reset); in ath79_usb_phy_probe()
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| D | phy-qcom-usb-hs.c | 36 struct reset_control *reset; member
151 if (uphy->reset) { in qcom_usb_hs_phy_power_on()
152 ret = reset_control_reset(uphy->reset); in qcom_usb_hs_phy_power_on()
208 struct reset_control *reset; in qcom_usb_hs_phy_probe() local
248 uphy->reset = reset = devm_reset_control_get(&ulpi->dev, "por"); in qcom_usb_hs_phy_probe()
249 if (IS_ERR(reset)) { in qcom_usb_hs_phy_probe()
250 if (PTR_ERR(reset) == -EPROBE_DEFER) in qcom_usb_hs_phy_probe()
251 return PTR_ERR(reset); in qcom_usb_hs_phy_probe()
252 uphy->reset = NULL; in qcom_usb_hs_phy_probe()
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| /drivers/clk/meson/ |
| D | meson-aoclk.c | 26 container_of(rcdev, struct meson_aoclk_reset_controller, reset); in meson_aoclk_do_reset()
29 BIT(rstc->data->reset[id])); in meson_aoclk_do_reset()
33 .reset = meson_aoclk_do_reset,
64 rstc->reset.ops = &meson_aoclk_reset_ops; in meson_aoclkc_probe()
65 rstc->reset.nr_resets = data->num_reset; in meson_aoclkc_probe()
66 rstc->reset.of_node = dev->of_node; in meson_aoclkc_probe()
67 ret = devm_reset_controller_register(dev, &rstc->reset); in meson_aoclkc_probe()
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| /drivers/phy/amlogic/ |
| D | phy-meson-axg-pcie.c | 31 struct reset_control *reset; member
79 return reset_control_reset(priv->reset); in phy_axg_pcie_init()
91 return reset_control_reset(priv->reset); in phy_axg_pcie_exit()
103 ret = reset_control_assert(priv->reset); in phy_axg_pcie_reset()
108 ret = reset_control_deassert(priv->reset); in phy_axg_pcie_reset()
122 .reset = phy_axg_pcie_reset,
156 priv->reset = devm_reset_control_array_get_exclusive(dev); in phy_axg_pcie_probe()
157 if (IS_ERR(priv->reset)) in phy_axg_pcie_probe()
158 return PTR_ERR(priv->reset); in phy_axg_pcie_probe()
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| /drivers/phy/allwinner/ |
| D | phy-sun9i-usb.c | 38 struct reset_control *reset; member
79 ret = reset_control_deassert(phy->reset); in sun9i_usb_phy_init()
101 reset_control_assert(phy->reset); in sun9i_usb_phy_exit()
139 phy->reset = devm_reset_control_get(dev, "hsic"); in sun9i_usb_phy_probe()
140 if (IS_ERR(phy->reset)) { in sun9i_usb_phy_probe()
142 return PTR_ERR(phy->reset); in sun9i_usb_phy_probe()
151 phy->reset = devm_reset_control_get(dev, "phy"); in sun9i_usb_phy_probe()
152 if (IS_ERR(phy->reset)) { in sun9i_usb_phy_probe()
154 return PTR_ERR(phy->reset); in sun9i_usb_phy_probe()
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| /drivers/vfio/platform/ |
| D | vfio_platform_private.h | 104 #define module_vfio_reset_handler(compat, reset) \ argument
106 static int __init reset ## _module_init(void) \
108 vfio_platform_register_reset(compat, reset); \
111 static void __exit reset ## _module_exit(void) \
113 vfio_platform_unregister_reset(compat, reset); \
115 module_init(reset ## _module_init); \
116 module_exit(reset ## _module_exit)
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| /drivers/gpu/drm/sun4i/ |
| D | sun6i_drc.c | 19 struct reset_control *reset; member
33 drc->reset = devm_reset_control_get(dev, NULL); in sun6i_drc_bind()
34 if (IS_ERR(drc->reset)) { in sun6i_drc_bind()
36 return PTR_ERR(drc->reset); in sun6i_drc_bind()
39 ret = reset_control_deassert(drc->reset); in sun6i_drc_bind()
73 reset_control_assert(drc->reset); in sun6i_drc_bind()
85 reset_control_assert(drc->reset); in sun6i_drc_unbind()
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| /drivers/vfio/platform/reset/ |
| D | Kconfig | 3 tristate "VFIO support for calxeda xgmac reset"
5 Enables the VFIO platform driver to handle reset for Calxeda xgmac
10 tristate "VFIO support for AMD XGBE reset"
12 Enables the VFIO platform driver to handle reset for AMD XGBE
17 tristate "VFIO support for Broadcom FlexRM reset"
21 Enables the VFIO platform driver to handle reset for Broadcom FlexRM
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| /drivers/staging/media/hantro/ |
| D | rockchip_vpu_hw.c | 324 .reset = hantro_g1_reset,
330 .reset = hantro_g1_reset,
336 .reset = hantro_g1_reset,
345 .reset = rockchip_vpu1_enc_reset,
352 .reset = rk3066_vpu_dec_reset,
358 .reset = rk3066_vpu_dec_reset,
364 .reset = rk3066_vpu_dec_reset,
373 .reset = rockchip_vpu1_enc_reset,
380 .reset = hantro_g1_reset,
386 .reset = hantro_g1_reset,
[all …]
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| /drivers/net/ethernet/mellanox/mlx4/ |
| D | reset.c | 44 void __iomem *reset; in mlx4_reset() local
92 reset = ioremap(pci_resource_start(dev->persist->pdev, 0) + in mlx4_reset()
95 if (!reset) { in mlx4_reset()
104 sem = readl(reset + MLX4_SEM_OFFSET); in mlx4_reset()
114 iounmap(reset); in mlx4_reset()
119 writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET); in mlx4_reset()
120 iounmap(reset); in mlx4_reset()
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| /drivers/clk/mmp/ |
| D | pwr-island.c | 21 u32 reset; member
46 if (pm_domain->reset || pm_domain->clock_enable) { in mmp_pm_domain_power_on()
49 val &= ~pm_domain->reset; in mmp_pm_domain_power_on()
55 val |= pm_domain->reset; in mmp_pm_domain_power_on()
93 u32 power_on, u32 reset, u32 clock_enable, in mmp_pm_domain_register() argument
104 pm_domain->reset = reset; in mmp_pm_domain_register()
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| /drivers/clk/qcom/ |
| D | common.c | 21 struct qcom_reset_controller reset; member
244 struct qcom_reset_controller *reset; in qcom_cc_really_probe() local
256 reset = &cc->reset; in qcom_cc_really_probe()
257 reset->rcdev.of_node = dev->of_node; in qcom_cc_really_probe()
258 reset->rcdev.ops = &qcom_reset_ops; in qcom_cc_really_probe()
259 reset->rcdev.owner = dev->driver->owner; in qcom_cc_really_probe()
260 reset->rcdev.nr_resets = desc->num_resets; in qcom_cc_really_probe()
261 reset->regmap = regmap; in qcom_cc_really_probe()
262 reset->reset_map = desc->resets; in qcom_cc_really_probe()
264 ret = devm_reset_controller_register(dev, &reset->rcdev); in qcom_cc_really_probe()
[all …]
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| /drivers/ata/ |
| D | pata_palmld.c | 35 struct gpio_desc *reset; member
74 lda->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); in palmld_pata_probe()
75 if (IS_ERR(lda->reset)) { in palmld_pata_probe()
77 return PTR_ERR(lda->reset); in palmld_pata_probe()
81 gpiod_set_value(lda->reset, 1); in palmld_pata_probe()
83 gpiod_set_value(lda->reset, 0); in palmld_pata_probe()
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