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Searched refs:rtw_write32 (Results 1 – 25 of 42) sorted by relevance

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/drivers/net/wireless/realtek/rtw88/
Drtw8723d.c169 rtw_write32(rtwdev, REG_BAR_MODE_CTRL, WLAN_BAR_VAL); in rtw8723d_phy_set_param()
189 rtw_write32(rtwdev, REG_LTR_IDLE_LATENCY, WLAN_LTR_IDLE_LAT); in rtw8723d_phy_set_param()
190 rtw_write32(rtwdev, REG_LTR_ACTIVE_LATENCY, WLAN_LTR_ACT_LAT); in rtw8723d_phy_set_param()
191 rtw_write32(rtwdev, REG_LTR_CTRL_BASIC, WLAN_LTR_CTRL1); in rtw8723d_phy_set_param()
192 rtw_write32(rtwdev, REG_LTR_CTRL_BASIC + 4, WLAN_LTR_CTRL2); in rtw8723d_phy_set_param()
378 rtw_write32(rtwdev, REG_ANALOG_P4, DIS_3WIRE); in rtw8723d_check_spur_ov_thres()
379 rtw_write32(rtwdev, REG_PSDFN, freq); in rtw8723d_check_spur_ov_thres()
380 rtw_write32(rtwdev, REG_PSDFN, START_PSD | freq); in rtw8723d_check_spur_ov_thres()
386 rtw_write32(rtwdev, REG_PSDFN, freq); in rtw8723d_check_spur_ov_thres()
387 rtw_write32(rtwdev, REG_ANALOG_P4, EN_3WIRE); in rtw8723d_check_spur_ov_thres()
[all …]
Dbf.c139 rtw_write32(rtwdev, REG_BBPSF_CTRL, psf_ctl | BIT(12)); in rtw_bf_cfg_sounding()
141 rtw_write32(rtwdev, REG_BBPSF_CTRL, psf_ctl & ~BIT(12)); in rtw_bf_cfg_sounding()
158 rtw_write32(rtwdev, REG_MU_STA_GID_VLD, param->given_gid_tab[0]); in rtw_bf_cfg_mu_bfee()
159 rtw_write32(rtwdev, REG_MU_STA_USER_POS_INFO, param->given_user_pos[0]); in rtw_bf_cfg_mu_bfee()
160 rtw_write32(rtwdev, REG_MU_STA_USER_POS_INFO + 4, in rtw_bf_cfg_mu_bfee()
164 rtw_write32(rtwdev, REG_MU_STA_GID_VLD, param->given_gid_tab[1]); in rtw_bf_cfg_mu_bfee()
165 rtw_write32(rtwdev, REG_MU_STA_USER_POS_INFO, param->given_user_pos[2]); in rtw_bf_cfg_mu_bfee()
166 rtw_write32(rtwdev, REG_MU_STA_USER_POS_INFO + 4, in rtw_bf_cfg_mu_bfee()
172 rtw_write32(rtwdev, REG_ASSOCIATED_BFMER0_INFO, 0); in rtw_bf_del_bfer_entry_mu()
173 rtw_write32(rtwdev, REG_ASSOCIATED_BFMER0_INFO + 4, 0); in rtw_bf_del_bfer_entry_mu()
[all …]
Drtw8822c.c364 rtw_write32(rtwdev, 0x1d70, 0x7e7e7e7e); in rtw8822c_dac_bb_setting()
367 rtw_write32(rtwdev, 0x1b00, 0x00000008); in rtw8822c_dac_bb_setting()
369 rtw_write32(rtwdev, 0x1b00, 0x0000000a); in rtw8822c_dac_bb_setting()
402 rtw_write32(rtwdev, base_addr + 0x30, 0x30db8041); in rtw8822c_dac_cal_adc()
403 rtw_write32(rtwdev, base_addr + 0x60, 0xf0040ff0); in rtw8822c_dac_cal_adc()
404 rtw_write32(rtwdev, base_addr + 0x0c, 0xdff00220); in rtw8822c_dac_cal_adc()
405 rtw_write32(rtwdev, base_addr + 0x10, 0x02dd08c4); in rtw8822c_dac_cal_adc()
406 rtw_write32(rtwdev, base_addr + 0x0c, 0x10000260); in rtw8822c_dac_cal_adc()
411 rtw_write32(rtwdev, 0x1c3c, path_sel + 0x8003); in rtw8822c_dac_cal_adc()
412 rtw_write32(rtwdev, 0x1c24, 0x00010002); in rtw8822c_dac_cal_adc()
[all …]
Dmac.c41 rtw_write32(rtwdev, REG_WMAC_TRXPTCL_CTL, value32); in rtw_set_channel_mac()
48 rtw_write32(rtwdev, REG_AFE_CTRL1, value32); in rtw_set_channel_mac()
89 rtw_write32(rtwdev, REG_PAD_CTRL1, value32); in rtw_mac_pre_system_cfg()
93 rtw_write32(rtwdev, REG_LED_CFG, value32); in rtw_mac_pre_system_cfg()
97 rtw_write32(rtwdev, REG_GPIO_MUXCFG, value32); in rtw_mac_pre_system_cfg()
110 rtw_write32(rtwdev, REG_WLRF1, value32); in rtw_mac_pre_system_cfg()
289 rtw_write32(rtwdev, REG_CPU_DMEM_CON, value); in __rtw_mac_init_system_cfg()
298 rtw_write32(rtwdev, REG_MCUFW_CTRL, tmp & (~BIT_BOOT_FSPI_EN)); in __rtw_mac_init_system_cfg()
300 rtw_write32(rtwdev, REG_GPIO_MUXCFG, value); in __rtw_mac_init_system_cfg()
430 rtw_write32(rtwdev, REG_H2CQ_CSR, BIT_H2CQ_FULL); in download_firmware_reg_backup()
[all …]
Dutil.c32 rtw_write32(rtwdev, ltecoex->ctrl, 0x800F0000 | offset); in ltecoex_read_reg()
46 rtw_write32(rtwdev, ltecoex->wdata, value); in ltecoex_reg_write()
47 rtw_write32(rtwdev, ltecoex->ctrl, 0xC00F0000 | offset); in ltecoex_reg_write()
73 rtw_write32(rtwdev, reg, (u32)val); in rtw_restore_reg()
Dsec.c77 rtw_write32(rtwdev, RTW_SEC_WRITE_REG, content); in rtw_sec_write_cam()
78 rtw_write32(rtwdev, RTW_SEC_CMD_REG, command); in rtw_sec_write_cam()
99 rtw_write32(rtwdev, RTW_SEC_WRITE_REG, 0); in rtw_sec_clear_cam()
100 rtw_write32(rtwdev, RTW_SEC_CMD_REG, command); in rtw_sec_clear_cam()
Dpci.c411 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_BCNQ, dma); in rtw_pci_reset_buf_desc()
419 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_H2CQ, dma); in rtw_pci_reset_buf_desc()
427 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_BKQ, dma); in rtw_pci_reset_buf_desc()
434 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_BEQ, dma); in rtw_pci_reset_buf_desc()
441 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_VOQ, dma); in rtw_pci_reset_buf_desc()
448 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_VIQ, dma); in rtw_pci_reset_buf_desc()
455 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_MGMTQ, dma); in rtw_pci_reset_buf_desc()
462 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_HI0Q, dma); in rtw_pci_reset_buf_desc()
469 rtw_write32(rtwdev, RTK_PCI_RXBD_DESA_MPDUQ, dma); in rtw_pci_reset_buf_desc()
472 rtw_write32(rtwdev, RTK_PCI_TXBD_RWPTR_CLR, 0xffffffff); in rtw_pci_reset_buf_desc()
[all …]
Dhci.h112 static inline void rtw_write32(struct rtw_dev *rtwdev, u32 addr, u32 val) in rtw_write32() function
138 rtw_write32(rtwdev, addr, val | bit); in rtw_write32_set()
162 rtw_write32(rtwdev, addr, val & ~bit); in rtw_write32_clr()
240 rtw_write32(rtwdev, addr, set); in rtw_write32_mask()
Drtw8821c.c119 rtw_write32(rtwdev, 0x1C94, 0xAFFFAFFF); in rtw8821c_phy_bf_init()
184 rtw_write32(rtwdev, REG_PROT_MODE_CTRL, value32); in rtw8821c_mac_init()
198 rtw_write32(rtwdev, REG_SIFS, WLAN_SIFS_CFG); in rtw8821c_mac_init()
201 rtw_write32(rtwdev, REG_RD_NAV_NXT, WLAN_NAV_CFG); in rtw8821c_mac_init()
208 rtw_write32(rtwdev, REG_TBTT_PROHIBIT, WLAN_TBTT_TIME); in rtw8821c_mac_init()
214 rtw_write32(rtwdev, REG_RXFLTMAP0, WLAN_RX_FILTER0); in rtw8821c_mac_init()
216 rtw_write32(rtwdev, REG_RCR, WLAN_RCR_CFG); in rtw8821c_mac_init()
223 rtw_write32(rtwdev, REG_WMAC_OPTION_FUNCTION + 8, WLAN_MAC_OPT_FUNC2); in rtw8821c_mac_init()
269 rtw_write32(rtwdev, REG_RFECTL, reg); in rtw8821c_switch_rf_set()
633 rtw_write32(rtwdev, offset_txagc[path] + rate_idx, in rtw8821c_set_tx_power_index_by_rate()
Drtw8822b.c129 rtw_write32(rtwdev, 0x1C94, 0xAFFFAFFF); in rtw8822b_phy_bf_init()
231 rtw_write32(rtwdev, REG_PROT_MODE_CTRL, value32); in rtw8822b_mac_init()
243 rtw_write32(rtwdev, REG_SIFS, WLAN_SIFS_CFG); in rtw8822b_mac_init()
246 rtw_write32(rtwdev, REG_RD_NAV_NXT, WLAN_NAV_CFG); in rtw8822b_mac_init()
251 rtw_write32(rtwdev, REG_TBTT_PROHIBIT, WLAN_TBTT_TIME); in rtw8822b_mac_init()
256 rtw_write32(rtwdev, REG_RXFLTMAP0, WLAN_RX_FILTER0); in rtw8822b_mac_init()
258 rtw_write32(rtwdev, REG_RCR, WLAN_RCR_CFG); in rtw8822b_mac_init()
262 rtw_write32(rtwdev, REG_WMAC_OPTION_FUNCTION + 8, WLAN_MAC_OPT_FUNC2); in rtw8822b_mac_init()
972 rtw_write32(rtwdev, offset_txagc[path] + rate_idx, in rtw8822b_set_tx_power_index_by_rate()
1346 rtw_write32(rtwdev, REG_RX_GAIN_EN, wl_rx_low_gain_on[i]); in rtw8822b_coex_cfg_wl_rx_gain()
[all …]
Dwow.c68 rtw_write32(rtwdev, REG_WKFMCAM_RWD, wdata); in rtw_wow_pattern_write_cam()
69 rtw_write32(rtwdev, REG_WKFMCAM_CMD, BIT_WKFCAM_POLLING_V1 | in rtw_wow_pattern_write_cam()
245 rtw_write32(rtwdev, REG_WKFMCAM_CMD, BIT_WKFCAM_POLLING_V1 | in rtw_wow_pattern_clear_cam()
Defuse.c107 rtw_write32(rtwdev, REG_EFUSE_CTRL, efuse_ctl & (~BIT_EF_FLAG)); in rtw_dump_physical_efuse_map()
Dphy.c541 rtw_write32(rtwdev, REG_RRSR, dm_info->rrsr_val_init & dm_info->rrsr_mask_min); in rtw_phy_rrsr_update()
886 rtw_write32(rtwdev, rf_sipi_addr->hssi_2, val32); in rtw_phy_read_rf_sipi()
890 rtw_write32(rtwdev, rf_sipi_addr_a->hssi_2, val32 & ~LSSI_READ_EDGE_MASK); in rtw_phy_read_rf_sipi()
891 rtw_write32(rtwdev, rf_sipi_addr_a->hssi_2, val32 | LSSI_READ_EDGE_MASK); in rtw_phy_read_rf_sipi()
938 rtw_write32(rtwdev, sipi_addr[rf_path], data_and_addr); in rtw_phy_write_rf_reg_sipi()
1592 rtw_write32(rtwdev, addr, data); in rtw_phy_cfg_agc()
1612 rtw_write32(rtwdev, addr, data); in rtw_phy_cfg_bb()
/drivers/staging/r8188eu/hal/
Dusb_halinit.c125 rtw_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF); in _InitInterrupt()
128 rtw_write32(Adapter, REG_HIMR_88E, imr); in _InitInterrupt()
132 rtw_write32(Adapter, REG_HIMRE_88E, imr_ex); in _InitInterrupt()
177 rtw_write32(Adapter, REG_RQPN, value32); in _InitQueueReservedPage()
181 rtw_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */ in _InitQueueReservedPage()
331 rtw_write32(Adapter, REG_CR, value32); in _InitNetworkType()
358 rtw_write32(Adapter, REG_RCR, haldata->ReceiveConfig); in _InitWMACSetting()
361 rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF); in _InitWMACSetting()
362 rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF); in _InitWMACSetting()
374 rtw_write32(Adapter, REG_RRSR, value32); in _InitAdaptiveCtrl()
[all …]
Drtl8188e_sreset.c26 rtw_write32(padapter, REG_TXDMA_STATUS, txdma_status); in rtl8188e_sreset_xmit_status_check()
55 rtw_write32(padapter, REG_RXDMA_STATUS, rx_dma_status); in rtl8188e_sreset_linked_status_check()
Drtl8188e_cmd.c699 rtw_write32(adapt, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]); in rtl8188e_set_p2p_ps_offload_cmd()
700 rtw_write32(adapt, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]); in rtl8188e_set_p2p_ps_offload_cmd()
701 rtw_write32(adapt, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]); in rtl8188e_set_p2p_ps_offload_cmd()
Dodm_interface.c40 rtw_write32(Adapter, RegAddr, Data); in ODM_Write4Byte()
/drivers/staging/rtl8723bs/hal/
Dsdio_halinit.c105 rtw_write32(padapter, REG_LEDCFG0, value32); in _InitPowerOn_8723BS()
162 rtw_write32(padapter, REG_RQPN, value32); in _InitQueueReservedPage()
364 rtw_write32(padapter, REG_CR, value32); in _InitNetworkType()
380 rtw_write32(padapter, REG_RCR, pHalData->ReceiveConfig); in _InitWMACSetting()
383 rtw_write32(padapter, REG_MAR, 0xFFFFFFFF); in _InitWMACSetting()
384 rtw_write32(padapter, REG_MAR + 4, 0xFFFFFFFF); in _InitWMACSetting()
410 rtw_write32(padapter, REG_RRSR, value32); in _InitAdaptiveCtrl()
437 rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x005EA42B); in _InitEDCA()
438 rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A44F); in _InitEDCA()
439 rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005EA324); in _InitEDCA()
[all …]
Drtl8723b_hal_init.c64 …ret = rtw_write32(padapter, (FW_8723B_START_ADDRESS + i * blockSize_p1), *((u32 *)(bufferPtr + i *… in _BlockWrite()
227 rtw_write32(adapter, REG_MCUFWDL, value32); in _FWFreeToGo()
490 rtw_write32(padapter, EFUSE_TEST, value32); in hal_EfuseSwitchToBank()
1720 rtw_write32(Adapter, REG_ARFR0_8723B, 0x00000010); in _InitBurstPktLen_8723BS()
1722 rtw_write32(Adapter, REG_ARFR0_8723B+4, 0xfffff000); in _InitBurstPktLen_8723BS()
1724 rtw_write32(Adapter, REG_ARFR0_8723B+4, 0x3e0ff000); in _InitBurstPktLen_8723BS()
1727 rtw_write32(Adapter, REG_ARFR1_8723B, 0x00000010); in _InitBurstPktLen_8723BS()
1728 rtw_write32(Adapter, REG_ARFR1_8723B+4, 0x003ff000); in _InitBurstPktLen_8723BS()
1803 rtw_write32(padapter, REG_TCR, value32); in rtl8723b_SetBeaconRelatedRegisters()
1806 rtw_write32(padapter, REG_TCR, value32); in rtl8723b_SetBeaconRelatedRegisters()
[all …]
Dodm_EdcaTurboCheck.c145 rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); in odm_EdcaTurboCheckCE()
154 rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); in odm_EdcaTurboCheckCE()
Drtl8723b_phycfg.c83 rtw_write32(Adapter, RegAddr, Data); in PHY_SetBBReg_8723B()
396 rtw_write32(Adapter, 0x948, 0x280); /* Others use Antenna S1 */ in PHY_BBConfig8723B()
Dodm_DIG.c19 …rtw_write32(pDM_Odm->Adapter, ODM_REG_NHM_TH3_TO_TH0_11N, 0xffffff52); /* 0x898 = 0xffffff52 th_3… in odm_NHMCounterStatisticsInit()
20 …rtw_write32(pDM_Odm->Adapter, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffffff); /* 0x89c = 0xffffffff th_7… in odm_NHMCounterStatisticsInit()
/drivers/staging/r8188eu/core/
Drtw_mp.c168 rtw_write32(pAdapter, REG_RCR, 0); in MPT_InitializeAdapter()
734 rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig); in SetPacketRx()
739 rtw_write32(pAdapter, REG_RCR, 0); in SetPacketRx()
751 rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set); in ResetPhyRxPktCount()
761 rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set); in GetPhyRxPktCounts()
802 rtw_write32(pAdapter, 0x808, psd_val); in rtw_GetPSDData()
806 rtw_write32(pAdapter, 0x808, psd_val); in rtw_GetPSDData()
/drivers/staging/rtl8723bs/core/
Drtw_io.c95 int rtw_write32(struct adapter *adapter, u32 addr, u32 val) in rtw_write32() function
/drivers/staging/r8188eu/include/
Drtw_io.h283 #define rtw_write32(adapter, addr, val) \ macro
358 rtw_write32(_a,_b,_c)

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