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Searched refs:rvu_poll_reg (Results 1 – 5 of 5) sorted by relevance

/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_cn10k.c77 err = rvu_poll_reg(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS, BIT_ULL(0), false); in rvu_get_lmtaddr()
Drvu_npa.c575 err = rvu_poll_reg(rvu, blkaddr, NDC_AF_CAMS_RD_INTERVAL, GENMASK_ULL(47, 32), true); in rvu_ndc_fix_locked_cacheline()
Drvu.c93 int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero) in rvu_poll_reg() function
508 err = rvu_poll_reg(rvu, block->addr, block->lfreset_reg, BIT_ULL(12), in rvu_lf_reset()
522 err = rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true); in rvu_block_reset()
525 while (rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true) == -EBUSY) in rvu_block_reset()
Drvu.h670 int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero);
Drvu_nix.c240 err = rvu_poll_reg(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0), true); in nix_rx_sync()
251 err = rvu_poll_reg(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0), true); in nix_rx_sync()
2110 err = rvu_poll_reg(rvu, blkaddr, in nix_smq_flush()
2202 err = rvu_poll_reg(rvu, blkaddr, NIX_AF_NDC_TX_SYNC, BIT_ULL(12), true); in nix_txschq_free()
4070 err = rvu_poll_reg(rvu, blkaddr, in nix_calibrate_x2p()