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Searched refs:sad (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/radeon/
Ddce3_1_afmt.c93 struct cea_sad *sad = &sads[j]; in dce3_2_afmt_write_sad_regs() local
95 if (sad->format == eld_reg_to_type[i][1]) { in dce3_2_afmt_write_sad_regs()
96 if (sad->channels > max_channels) { in dce3_2_afmt_write_sad_regs()
97 value = MAX_CHANNELS(sad->channels) | in dce3_2_afmt_write_sad_regs()
98 DESCRIPTOR_BYTE_2(sad->byte2) | in dce3_2_afmt_write_sad_regs()
99 SUPPORTED_FREQUENCIES(sad->freq); in dce3_2_afmt_write_sad_regs()
100 max_channels = sad->channels; in dce3_2_afmt_write_sad_regs()
103 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM) in dce3_2_afmt_write_sad_regs()
104 stereo_freqs |= sad->freq; in dce3_2_afmt_write_sad_regs()
Ddce6_afmt.c235 struct cea_sad *sad = &sads[j]; in dce6_afmt_write_sad_regs() local
237 if (sad->format == eld_reg_to_type[i][1]) { in dce6_afmt_write_sad_regs()
238 if (sad->channels > max_channels) { in dce6_afmt_write_sad_regs()
239 value = MAX_CHANNELS(sad->channels) | in dce6_afmt_write_sad_regs()
240 DESCRIPTOR_BYTE_2(sad->byte2) | in dce6_afmt_write_sad_regs()
241 SUPPORTED_FREQUENCIES(sad->freq); in dce6_afmt_write_sad_regs()
242 max_channels = sad->channels; in dce6_afmt_write_sad_regs()
245 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM) in dce6_afmt_write_sad_regs()
246 stereo_freqs |= sad->freq; in dce6_afmt_write_sad_regs()
Devergreen_hdmi.c183 struct cea_sad *sad = &sads[j]; in evergreen_hdmi_write_sad_regs() local
185 if (sad->format == eld_reg_to_type[i][1]) { in evergreen_hdmi_write_sad_regs()
186 if (sad->channels > max_channels) { in evergreen_hdmi_write_sad_regs()
187 value = MAX_CHANNELS(sad->channels) | in evergreen_hdmi_write_sad_regs()
188 DESCRIPTOR_BYTE_2(sad->byte2) | in evergreen_hdmi_write_sad_regs()
189 SUPPORTED_FREQUENCIES(sad->freq); in evergreen_hdmi_write_sad_regs()
190 max_channels = sad->channels; in evergreen_hdmi_write_sad_regs()
193 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM) in evergreen_hdmi_write_sad_regs()
194 stereo_freqs |= sad->freq; in evergreen_hdmi_write_sad_regs()
/drivers/edac/
Dskx_base.c221 #define SKX_SAD_MOD3MODE(sad) GET_BITFIELD((sad), 30, 31) argument
222 #define SKX_SAD_MOD3(sad) GET_BITFIELD((sad), 27, 27) argument
223 #define SKX_SAD_LIMIT(sad) (((u64)GET_BITFIELD((sad), 7, 26) << 26) | MASK26) argument
224 #define SKX_SAD_MOD3ASMOD2(sad) GET_BITFIELD((sad), 5, 6) argument
225 #define SKX_SAD_ATTR(sad) GET_BITFIELD((sad), 3, 4) argument
226 #define SKX_SAD_INTERLEAVE(sad) GET_BITFIELD((sad), 1, 2) argument
227 #define SKX_SAD_ENABLE(sad) GET_BITFIELD((sad), 0, 0) argument
271 u32 sad, ilv; in skx_sad_decode() local
284 SKX_GET_SAD(d, i, sad); in skx_sad_decode()
285 limit = SKX_SAD_LIMIT(sad); in skx_sad_decode()
[all …]
/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_helpers.c105 struct cea_sad *sad = &sads[i]; in dm_helpers_parse_edid_caps() local
107 edid_caps->audio_modes[i].format_code = sad->format; in dm_helpers_parse_edid_caps()
108 edid_caps->audio_modes[i].channel_count = sad->channels + 1; in dm_helpers_parse_edid_caps()
109 edid_caps->audio_modes[i].sample_rate = sad->freq; in dm_helpers_parse_edid_caps()
110 edid_caps->audio_modes[i].sample_size = sad->byte2; in dm_helpers_parse_edid_caps()
/drivers/gpu/drm/amd/amdgpu/
Ddce_v8_0.c1340 struct cea_sad *sad = &sads[j]; in dce_v8_0_audio_write_sad_regs() local
1342 if (sad->format == eld_reg_to_type[i][1]) { in dce_v8_0_audio_write_sad_regs()
1343 if (sad->channels > max_channels) { in dce_v8_0_audio_write_sad_regs()
1344 value = (sad->channels << in dce_v8_0_audio_write_sad_regs()
1346 (sad->byte2 << in dce_v8_0_audio_write_sad_regs()
1348 (sad->freq << in dce_v8_0_audio_write_sad_regs()
1350 max_channels = sad->channels; in dce_v8_0_audio_write_sad_regs()
1353 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM) in dce_v8_0_audio_write_sad_regs()
1354 stereo_freqs |= sad->freq; in dce_v8_0_audio_write_sad_regs()
Ddce_v6_0.c1289 struct cea_sad *sad = &sads[j]; in dce_v6_0_audio_write_sad_regs() local
1291 if (sad->format == eld_reg_to_type[i][1]) { in dce_v6_0_audio_write_sad_regs()
1292 if (sad->channels > max_channels) { in dce_v6_0_audio_write_sad_regs()
1294 MAX_CHANNELS, sad->channels); in dce_v6_0_audio_write_sad_regs()
1296 DESCRIPTOR_BYTE_2, sad->byte2); in dce_v6_0_audio_write_sad_regs()
1298 SUPPORTED_FREQUENCIES, sad->freq); in dce_v6_0_audio_write_sad_regs()
1299 max_channels = sad->channels; in dce_v6_0_audio_write_sad_regs()
1302 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM) in dce_v6_0_audio_write_sad_regs()
1303 stereo_freqs |= sad->freq; in dce_v6_0_audio_write_sad_regs()
Ddce_v10_0.c1387 struct cea_sad *sad = &sads[j]; in dce_v10_0_audio_write_sad_regs() local
1389 if (sad->format == eld_reg_to_type[i][1]) { in dce_v10_0_audio_write_sad_regs()
1390 if (sad->channels > max_channels) { in dce_v10_0_audio_write_sad_regs()
1392 MAX_CHANNELS, sad->channels); in dce_v10_0_audio_write_sad_regs()
1394 DESCRIPTOR_BYTE_2, sad->byte2); in dce_v10_0_audio_write_sad_regs()
1396 SUPPORTED_FREQUENCIES, sad->freq); in dce_v10_0_audio_write_sad_regs()
1397 max_channels = sad->channels; in dce_v10_0_audio_write_sad_regs()
1400 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM) in dce_v10_0_audio_write_sad_regs()
1401 stereo_freqs |= sad->freq; in dce_v10_0_audio_write_sad_regs()
Ddce_v11_0.c1413 struct cea_sad *sad = &sads[j]; in dce_v11_0_audio_write_sad_regs() local
1415 if (sad->format == eld_reg_to_type[i][1]) { in dce_v11_0_audio_write_sad_regs()
1416 if (sad->channels > max_channels) { in dce_v11_0_audio_write_sad_regs()
1418 MAX_CHANNELS, sad->channels); in dce_v11_0_audio_write_sad_regs()
1420 DESCRIPTOR_BYTE_2, sad->byte2); in dce_v11_0_audio_write_sad_regs()
1422 SUPPORTED_FREQUENCIES, sad->freq); in dce_v11_0_audio_write_sad_regs()
1423 max_channels = sad->channels; in dce_v11_0_audio_write_sad_regs()
1426 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM) in dce_v11_0_audio_write_sad_regs()
1427 stereo_freqs |= sad->freq; in dce_v11_0_audio_write_sad_regs()
/drivers/gpu/drm/
Ddrm_edid.c4608 const u8 *sad = &db[1 + j * 3]; in drm_edid_to_sad() local
4610 (*sads)[j].format = (sad[0] & 0x78) >> 3; in drm_edid_to_sad()
4611 (*sads)[j].channels = sad[0] & 0x7; in drm_edid_to_sad()
4612 (*sads)[j].freq = sad[1] & 0x7F; in drm_edid_to_sad()
4613 (*sads)[j].byte2 = sad[2]; in drm_edid_to_sad()
/drivers/iommu/
DKconfig330 If you say Y here then you'll make me very sad. Instead, say N