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Searched refs:sec_cnt (Results 1 – 18 of 18) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dsdma_v4_4.c169 uint32_t sec_cnt; in sdma_v4_4_get_ras_error_count() local
179 sec_cnt = (value & in sdma_v4_4_get_ras_error_count()
182 if (sec_cnt) { in sdma_v4_4_get_ras_error_count()
185 instance, sec_cnt); in sdma_v4_4_get_ras_error_count()
186 *sec_count += sec_cnt; in sdma_v4_4_get_ras_error_count()
Dgfx_v9_4_2.c1451 uint32_t sec_cnt, ded_cnt; in gfx_v9_4_2_get_reg_error_count() local
1459 sec_cnt = SOC15_RAS_REG_FIELD_VAL( in gfx_v9_4_2_get_reg_error_count()
1461 if (sec_cnt) { in gfx_v9_4_2_get_reg_error_count()
1465 sec_cnt); in gfx_v9_4_2_get_reg_error_count()
1466 *sec_count += sec_cnt; in gfx_v9_4_2_get_reg_error_count()
1487 uint32_t sec_cnt = 0, ded_cnt = 0; in gfx_v9_4_2_query_sram_edc_count() local
1517 j, k, data, &sec_cnt, &ded_cnt); in gfx_v9_4_2_query_sram_edc_count()
1527 *sec_count += sec_cnt; in gfx_v9_4_2_query_sram_edc_count()
1539 uint32_t instance, uint32_t sec_cnt, in gfx_v9_4_2_log_utc_edc_count() argument
1555 bank, vml2_way_str[way], mem, sec_cnt, ded_cnt); in gfx_v9_4_2_log_utc_edc_count()
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Dmmhub_v1_0.c711 uint32_t sec_cnt, ded_cnt; in mmhub_v1_0_get_ras_error_count() local
717 sec_cnt = (value & in mmhub_v1_0_get_ras_error_count()
720 if (sec_cnt) { in mmhub_v1_0_get_ras_error_count()
724 sec_cnt); in mmhub_v1_0_get_ras_error_count()
725 *sec_count += sec_cnt; in mmhub_v1_0_get_ras_error_count()
Dgfx_v9_4.c834 uint32_t sec_cnt, ded_cnt; in gfx_v9_4_ras_error_count() local
842 sec_cnt = (value & gfx_v9_4_ras_fields[i].sec_count_mask) >> in gfx_v9_4_ras_error_count()
844 if (sec_cnt) { in gfx_v9_4_ras_error_count()
848 sec_cnt); in gfx_v9_4_ras_error_count()
849 *sec_count += sec_cnt; in gfx_v9_4_ras_error_count()
Dmmhub_v1_7.c1213 uint32_t sec_cnt, ded_cnt; in mmhub_v1_7_get_ras_error_count() local
1219 sec_cnt = (value & in mmhub_v1_7_get_ras_error_count()
1222 if (sec_cnt) { in mmhub_v1_7_get_ras_error_count()
1225 sec_cnt); in mmhub_v1_7_get_ras_error_count()
1226 *sec_count += sec_cnt; in mmhub_v1_7_get_ras_error_count()
Dmmhub_v9_4.c1560 uint32_t sec_cnt, ded_cnt; in mmhub_v9_4_get_ras_error_count() local
1566 sec_cnt = (value & in mmhub_v9_4_get_ras_error_count()
1569 if (sec_cnt) { in mmhub_v9_4_get_ras_error_count()
1572 sec_cnt); in mmhub_v9_4_get_ras_error_count()
1573 *sec_count += sec_cnt; in mmhub_v9_4_get_ras_error_count()
Dsdma_v4_0.c2744 uint32_t sec_cnt; in sdma_v4_0_get_ras_error_count() local
2751 sec_cnt = (value & in sdma_v4_0_get_ras_error_count()
2754 if (sec_cnt) { in sdma_v4_0_get_ras_error_count()
2757 instance, sec_cnt); in sdma_v4_0_get_ras_error_count()
2758 *sec_count += sec_cnt; in sdma_v4_0_get_ras_error_count()
Dgfx_v9_0.c6667 uint32_t sec_cnt, ded_cnt; in gfx_v9_0_ras_error_count() local
6675 sec_cnt = (value & in gfx_v9_0_ras_error_count()
6678 if (sec_cnt) { in gfx_v9_0_ras_error_count()
6683 sec_cnt); in gfx_v9_0_ras_error_count()
6684 *sec_count += sec_cnt; in gfx_v9_0_ras_error_count()
/drivers/staging/rts5208/
Drtsx_scsi.c841 u16 sec_cnt; in read_write() local
886 sec_cnt = ((u16)(srb->cmnd[7]) << 8) | srb->cmnd[8]; in read_write()
890 sec_cnt = srb->cmnd[4]; in read_write()
891 if (sec_cnt == 0) in read_write()
892 sec_cnt = 256; in read_write()
899 sec_cnt = ((u16)(srb->cmnd[9]) << 8) | srb->cmnd[10]; in read_write()
910 ((start_sec + sec_cnt) > get_card_size(chip, lun))) { in read_write()
915 if (sec_cnt == 0) { in read_write()
940 retval = card_rw(srb, chip, start_sec, sec_cnt); in read_write()
2686 u16 sec_cnt; in led_shine() local
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Dms.c96 u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k, in ms_transfer_data() argument
120 MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8)); in ms_transfer_data()
121 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt); in ms_transfer_data()
131 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512); in ms_transfer_data()
2542 u32 start_sec, u16 sec_cnt, u8 cmd) argument
2548 data[1] = (u8)(sec_cnt >> 8);
2549 data[2] = (u8)sec_cnt;
Drtsx_card.c939 u32 sec_addr, u16 sec_cnt) in card_rw() argument
951 retval = chip->rw_card[lun](srb, chip, sec_addr, sec_cnt); in card_rw()
Drtsx_card.h1002 u32 sec_addr, u16 sec_cnt);
Drtsx_chip.h341 u32 sec_addr, u16 sec_cnt);
/drivers/memstick/host/
Drtsx_pci_ms.c134 u16 sec_cnt = (u16)(length / 512); in ms_transfer_data() local
156 0xFF, (u8)(sec_cnt >> 8)); in ms_transfer_data()
158 0xFF, (u8)sec_cnt); in ms_transfer_data()
Drtsx_usb_ms.c236 u16 sec_cnt = (u16)(length / 512); in ms_transfer_data() local
268 0xFF, (u8)(sec_cnt >> 8)); in ms_transfer_data()
270 0xFF, (u8)sec_cnt); in ms_transfer_data()
/drivers/misc/habanalabs/include/common/
Dcpucp_if.h46 __le32 sec_cnt; member
/drivers/mtd/nand/raw/
Dcadence-nand-controller.c1210 u32 sec_size = 0, offset = 0, sec_cnt = 1; in cadence_nand_prepare_data_size() local
1220 sec_cnt = cdns_chip->sector_count; in cadence_nand_prepare_data_size()
1225 sec_cnt = cdns_chip->sector_count; in cadence_nand_prepare_data_size()
1241 reg |= FIELD_PREP(TRAN_CFG_0_SEC_CNT, sec_cnt); in cadence_nand_prepare_data_size()
/drivers/misc/habanalabs/gaudi/
Dgaudi.c7743 hbm_ecc_data->sec_cont_cnt, hbm_ecc_data->sec_cnt, in gaudi_hbm_read_interrupts()