1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 3 */ 4 5 #ifndef _DPU_HW_SSPP_H 6 #define _DPU_HW_SSPP_H 7 8 #include "dpu_hw_catalog.h" 9 #include "dpu_hw_mdss.h" 10 #include "dpu_hw_util.h" 11 #include "dpu_hw_blk.h" 12 #include "dpu_formats.h" 13 14 struct dpu_hw_pipe; 15 16 /** 17 * Flags 18 */ 19 #define DPU_SSPP_FLIP_LR BIT(0) 20 #define DPU_SSPP_FLIP_UD BIT(1) 21 #define DPU_SSPP_SOURCE_ROTATED_90 BIT(2) 22 #define DPU_SSPP_ROT_90 BIT(3) 23 #define DPU_SSPP_SOLID_FILL BIT(4) 24 25 /** 26 * Define all scaler feature bits in catalog 27 */ 28 #define DPU_SSPP_SCALER ((1UL << DPU_SSPP_SCALER_RGB) | \ 29 (1UL << DPU_SSPP_SCALER_QSEED2) | \ 30 (1UL << DPU_SSPP_SCALER_QSEED3) | \ 31 (1UL << DPU_SSPP_SCALER_QSEED3LITE) | \ 32 (1UL << DPU_SSPP_SCALER_QSEED4)) 33 34 /** 35 * Component indices 36 */ 37 enum { 38 DPU_SSPP_COMP_0, 39 DPU_SSPP_COMP_1_2, 40 DPU_SSPP_COMP_2, 41 DPU_SSPP_COMP_3, 42 43 DPU_SSPP_COMP_MAX 44 }; 45 46 /** 47 * DPU_SSPP_RECT_SOLO - multirect disabled 48 * DPU_SSPP_RECT_0 - rect0 of a multirect pipe 49 * DPU_SSPP_RECT_1 - rect1 of a multirect pipe 50 * 51 * Note: HW supports multirect with either RECT0 or 52 * RECT1. Considering no benefit of such configs over 53 * SOLO mode and to keep the plane management simple, 54 * we dont support single rect multirect configs. 55 */ 56 enum dpu_sspp_multirect_index { 57 DPU_SSPP_RECT_SOLO = 0, 58 DPU_SSPP_RECT_0, 59 DPU_SSPP_RECT_1, 60 }; 61 62 enum dpu_sspp_multirect_mode { 63 DPU_SSPP_MULTIRECT_NONE = 0, 64 DPU_SSPP_MULTIRECT_PARALLEL, 65 DPU_SSPP_MULTIRECT_TIME_MX, 66 }; 67 68 enum { 69 DPU_FRAME_LINEAR, 70 DPU_FRAME_TILE_A4X, 71 DPU_FRAME_TILE_A5X, 72 }; 73 74 enum dpu_hw_filter { 75 DPU_SCALE_FILTER_NEAREST = 0, 76 DPU_SCALE_FILTER_BIL, 77 DPU_SCALE_FILTER_PCMN, 78 DPU_SCALE_FILTER_CA, 79 DPU_SCALE_FILTER_MAX 80 }; 81 82 enum dpu_hw_filter_alpa { 83 DPU_SCALE_ALPHA_PIXEL_REP, 84 DPU_SCALE_ALPHA_BIL 85 }; 86 87 enum dpu_hw_filter_yuv { 88 DPU_SCALE_2D_4X4, 89 DPU_SCALE_2D_CIR, 90 DPU_SCALE_1D_SEP, 91 DPU_SCALE_BIL 92 }; 93 94 struct dpu_hw_sharp_cfg { 95 u32 strength; 96 u32 edge_thr; 97 u32 smooth_thr; 98 u32 noise_thr; 99 }; 100 101 struct dpu_hw_pixel_ext { 102 /* scaling factors are enabled for this input layer */ 103 uint8_t enable_pxl_ext; 104 105 int init_phase_x[DPU_MAX_PLANES]; 106 int phase_step_x[DPU_MAX_PLANES]; 107 int init_phase_y[DPU_MAX_PLANES]; 108 int phase_step_y[DPU_MAX_PLANES]; 109 110 /* 111 * Number of pixels extension in left, right, top and bottom direction 112 * for all color components. This pixel value for each color component 113 * should be sum of fetch + repeat pixels. 114 */ 115 int num_ext_pxls_left[DPU_MAX_PLANES]; 116 int num_ext_pxls_right[DPU_MAX_PLANES]; 117 int num_ext_pxls_top[DPU_MAX_PLANES]; 118 int num_ext_pxls_btm[DPU_MAX_PLANES]; 119 120 /* 121 * Number of pixels needs to be overfetched in left, right, top and 122 * bottom directions from source image for scaling. 123 */ 124 int left_ftch[DPU_MAX_PLANES]; 125 int right_ftch[DPU_MAX_PLANES]; 126 int top_ftch[DPU_MAX_PLANES]; 127 int btm_ftch[DPU_MAX_PLANES]; 128 129 /* 130 * Number of pixels needs to be repeated in left, right, top and 131 * bottom directions for scaling. 132 */ 133 int left_rpt[DPU_MAX_PLANES]; 134 int right_rpt[DPU_MAX_PLANES]; 135 int top_rpt[DPU_MAX_PLANES]; 136 int btm_rpt[DPU_MAX_PLANES]; 137 138 uint32_t roi_w[DPU_MAX_PLANES]; 139 uint32_t roi_h[DPU_MAX_PLANES]; 140 141 /* 142 * Filter type to be used for scaling in horizontal and vertical 143 * directions 144 */ 145 enum dpu_hw_filter horz_filter[DPU_MAX_PLANES]; 146 enum dpu_hw_filter vert_filter[DPU_MAX_PLANES]; 147 148 }; 149 150 /** 151 * struct dpu_hw_pipe_cfg : Pipe description 152 * @layout: format layout information for programming buffer to hardware 153 * @src_rect: src ROI, caller takes into account the different operations 154 * such as decimation, flip etc to program this field 155 * @dest_rect: destination ROI. 156 * @index: index of the rectangle of SSPP 157 * @mode: parallel or time multiplex multirect mode 158 */ 159 struct dpu_hw_pipe_cfg { 160 struct dpu_hw_fmt_layout layout; 161 struct drm_rect src_rect; 162 struct drm_rect dst_rect; 163 enum dpu_sspp_multirect_index index; 164 enum dpu_sspp_multirect_mode mode; 165 }; 166 167 /** 168 * struct dpu_hw_pipe_qos_cfg : Source pipe QoS configuration 169 * @danger_lut: LUT for generate danger level based on fill level 170 * @safe_lut: LUT for generate safe level based on fill level 171 * @creq_lut: LUT for generate creq level based on fill level 172 * @creq_vblank: creq value generated to vbif during vertical blanking 173 * @danger_vblank: danger value generated during vertical blanking 174 * @vblank_en: enable creq_vblank and danger_vblank during vblank 175 * @danger_safe_en: enable danger safe generation 176 */ 177 struct dpu_hw_pipe_qos_cfg { 178 u32 danger_lut; 179 u32 safe_lut; 180 u64 creq_lut; 181 u32 creq_vblank; 182 u32 danger_vblank; 183 bool vblank_en; 184 bool danger_safe_en; 185 }; 186 187 /** 188 * enum CDP preload ahead address size 189 */ 190 enum { 191 DPU_SSPP_CDP_PRELOAD_AHEAD_32, 192 DPU_SSPP_CDP_PRELOAD_AHEAD_64 193 }; 194 195 /** 196 * struct dpu_hw_pipe_cdp_cfg : CDP configuration 197 * @enable: true to enable CDP 198 * @ubwc_meta_enable: true to enable ubwc metadata preload 199 * @tile_amortize_enable: true to enable amortization control for tile format 200 * @preload_ahead: number of request to preload ahead 201 * DPU_SSPP_CDP_PRELOAD_AHEAD_32, 202 * DPU_SSPP_CDP_PRELOAD_AHEAD_64 203 */ 204 struct dpu_hw_pipe_cdp_cfg { 205 bool enable; 206 bool ubwc_meta_enable; 207 bool tile_amortize_enable; 208 u32 preload_ahead; 209 }; 210 211 /** 212 * struct dpu_hw_pipe_ts_cfg - traffic shaper configuration 213 * @size: size to prefill in bytes, or zero to disable 214 * @time: time to prefill in usec, or zero to disable 215 */ 216 struct dpu_hw_pipe_ts_cfg { 217 u64 size; 218 u64 time; 219 }; 220 221 /** 222 * struct dpu_hw_sspp_ops - interface to the SSPP Hw driver functions 223 * Caller must call the init function to get the pipe context for each pipe 224 * Assumption is these functions will be called after clocks are enabled 225 */ 226 struct dpu_hw_sspp_ops { 227 /** 228 * setup_format - setup pixel format cropping rectangle, flip 229 * @ctx: Pointer to pipe context 230 * @cfg: Pointer to pipe config structure 231 * @flags: Extra flags for format config 232 * @index: rectangle index in multirect 233 */ 234 void (*setup_format)(struct dpu_hw_pipe *ctx, 235 const struct dpu_format *fmt, u32 flags, 236 enum dpu_sspp_multirect_index index); 237 238 /** 239 * setup_rects - setup pipe ROI rectangles 240 * @ctx: Pointer to pipe context 241 * @cfg: Pointer to pipe config structure 242 * @index: rectangle index in multirect 243 */ 244 void (*setup_rects)(struct dpu_hw_pipe *ctx, 245 struct dpu_hw_pipe_cfg *cfg, 246 enum dpu_sspp_multirect_index index); 247 248 /** 249 * setup_pe - setup pipe pixel extension 250 * @ctx: Pointer to pipe context 251 * @pe_ext: Pointer to pixel ext settings 252 */ 253 void (*setup_pe)(struct dpu_hw_pipe *ctx, 254 struct dpu_hw_pixel_ext *pe_ext); 255 256 /** 257 * setup_sourceaddress - setup pipe source addresses 258 * @ctx: Pointer to pipe context 259 * @cfg: Pointer to pipe config structure 260 * @index: rectangle index in multirect 261 */ 262 void (*setup_sourceaddress)(struct dpu_hw_pipe *ctx, 263 struct dpu_hw_pipe_cfg *cfg, 264 enum dpu_sspp_multirect_index index); 265 266 /** 267 * setup_csc - setup color space coversion 268 * @ctx: Pointer to pipe context 269 * @data: Pointer to config structure 270 */ 271 void (*setup_csc)(struct dpu_hw_pipe *ctx, struct dpu_csc_cfg *data); 272 273 /** 274 * setup_solidfill - enable/disable colorfill 275 * @ctx: Pointer to pipe context 276 * @const_color: Fill color value 277 * @flags: Pipe flags 278 * @index: rectangle index in multirect 279 */ 280 void (*setup_solidfill)(struct dpu_hw_pipe *ctx, u32 color, 281 enum dpu_sspp_multirect_index index); 282 283 /** 284 * setup_multirect - setup multirect configuration 285 * @ctx: Pointer to pipe context 286 * @index: rectangle index in multirect 287 * @mode: parallel fetch / time multiplex multirect mode 288 */ 289 290 void (*setup_multirect)(struct dpu_hw_pipe *ctx, 291 enum dpu_sspp_multirect_index index, 292 enum dpu_sspp_multirect_mode mode); 293 294 /** 295 * setup_sharpening - setup sharpening 296 * @ctx: Pointer to pipe context 297 * @cfg: Pointer to config structure 298 */ 299 void (*setup_sharpening)(struct dpu_hw_pipe *ctx, 300 struct dpu_hw_sharp_cfg *cfg); 301 302 /** 303 * setup_danger_safe_lut - setup danger safe LUTs 304 * @ctx: Pointer to pipe context 305 * @cfg: Pointer to pipe QoS configuration 306 * 307 */ 308 void (*setup_danger_safe_lut)(struct dpu_hw_pipe *ctx, 309 struct dpu_hw_pipe_qos_cfg *cfg); 310 311 /** 312 * setup_creq_lut - setup CREQ LUT 313 * @ctx: Pointer to pipe context 314 * @cfg: Pointer to pipe QoS configuration 315 * 316 */ 317 void (*setup_creq_lut)(struct dpu_hw_pipe *ctx, 318 struct dpu_hw_pipe_qos_cfg *cfg); 319 320 /** 321 * setup_qos_ctrl - setup QoS control 322 * @ctx: Pointer to pipe context 323 * @cfg: Pointer to pipe QoS configuration 324 * 325 */ 326 void (*setup_qos_ctrl)(struct dpu_hw_pipe *ctx, 327 struct dpu_hw_pipe_qos_cfg *cfg); 328 329 /** 330 * setup_histogram - setup histograms 331 * @ctx: Pointer to pipe context 332 * @cfg: Pointer to histogram configuration 333 */ 334 void (*setup_histogram)(struct dpu_hw_pipe *ctx, 335 void *cfg); 336 337 /** 338 * setup_scaler - setup scaler 339 * @ctx: Pointer to pipe context 340 * @pipe_cfg: Pointer to pipe configuration 341 * @pe_cfg: Pointer to pixel extension configuration 342 * @scaler_cfg: Pointer to scaler configuration 343 */ 344 void (*setup_scaler)(struct dpu_hw_pipe *ctx, 345 struct dpu_hw_pipe_cfg *pipe_cfg, 346 struct dpu_hw_pixel_ext *pe_cfg, 347 void *scaler_cfg); 348 349 /** 350 * get_scaler_ver - get scaler h/w version 351 * @ctx: Pointer to pipe context 352 */ 353 u32 (*get_scaler_ver)(struct dpu_hw_pipe *ctx); 354 355 /** 356 * setup_cdp - setup client driven prefetch 357 * @ctx: Pointer to pipe context 358 * @cfg: Pointer to cdp configuration 359 */ 360 void (*setup_cdp)(struct dpu_hw_pipe *ctx, 361 struct dpu_hw_pipe_cdp_cfg *cfg); 362 }; 363 364 /** 365 * struct dpu_hw_pipe - pipe description 366 * @base: hardware block base structure 367 * @hw: block hardware details 368 * @catalog: back pointer to catalog 369 * @mdp: pointer to associated mdp portion of the catalog 370 * @idx: pipe index 371 * @cap: pointer to layer_cfg 372 * @ops: pointer to operations possible for this pipe 373 */ 374 struct dpu_hw_pipe { 375 struct dpu_hw_blk base; 376 struct dpu_hw_blk_reg_map hw; 377 struct dpu_mdss_cfg *catalog; 378 const struct dpu_mdp_cfg *mdp; 379 380 /* Pipe */ 381 enum dpu_sspp idx; 382 const struct dpu_sspp_cfg *cap; 383 384 /* Ops */ 385 struct dpu_hw_sspp_ops ops; 386 }; 387 388 /** 389 * dpu_hw_sspp_init - initializes the sspp hw driver object. 390 * Should be called once before accessing every pipe. 391 * @idx: Pipe index for which driver object is required 392 * @addr: Mapped register io address of MDP 393 * @catalog : Pointer to mdss catalog data 394 * @is_virtual_pipe: is this pipe virtual pipe 395 */ 396 struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx, 397 void __iomem *addr, struct dpu_mdss_cfg *catalog, 398 bool is_virtual_pipe); 399 400 /** 401 * dpu_hw_sspp_destroy(): Destroys SSPP driver context 402 * should be called during Hw pipe cleanup. 403 * @ctx: Pointer to SSPP driver context returned by dpu_hw_sspp_init 404 */ 405 void dpu_hw_sspp_destroy(struct dpu_hw_pipe *ctx); 406 407 #endif /*_DPU_HW_SSPP_H */ 408 409