| /drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_resource.c | 175 .socclk_mhz = 278.0,
186 .socclk_mhz = 278.0,
197 .socclk_mhz = 278.0,
208 .socclk_mhz = 715.0,
219 .socclk_mhz = 953.0,
230 .socclk_mhz = 278.0,
241 .socclk_mhz = 715.0,
252 .socclk_mhz = 953.0,
264 .socclk_mhz = 953.0,
1048 pipes[0].clks_cfg.socclk_mhz = dml->soc.clock_limits[vlevel].socclk_mhz; in calculate_wm_set_for_vlevel()
[all …]
|
| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 240 .socclk_mhz = 560.0,
251 .socclk_mhz = 694.0,
262 .socclk_mhz = 875.0,
273 .socclk_mhz = 1000.0,
284 .socclk_mhz = 1200.0,
296 .socclk_mhz = 1200.0,
351 .socclk_mhz = 560.0,
362 .socclk_mhz = 694.0,
373 .socclk_mhz = 875.0,
384 .socclk_mhz = 1000.0,
[all …]
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| D | rn_clk_mgr.c | 588 .socclk_mhz = 0,
595 .socclk_mhz = 0,
602 .socclk_mhz = 0,
609 .socclk_mhz = 0,
896 bw_params->clk_table.entries[i].socclk_mhz = find_socclk_for_voltage(clock_table, in rn_clk_mgr_helper_populate_bw_params()
|
| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_socbb.h | 30 uint32_t socclk_mhz; member
|
| /drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_structs.h | 61 double socclk_mhz; member
378 double socclk_mhz; member
|
| D | display_mode_lib.c | 257 dml_print("DML PARAMS: socclk_mhz = %3.2f\n", clks_cfg->socclk_mhz); in dml_log_pipe_params()
|
| D | display_mode_vba.c | 265 mode_lib->vba.SOCCLK = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params()
281 mode_lib->vba.SOCCLKPerState[i] = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params()
887 mode_lib->vba.SOCCLK = mode_lib->vba.cache_pipes[0].clks_cfg.socclk_mhz; in ModeSupportAndSystemConfiguration()
|
| /drivers/gpu/drm/amd/display/dc/dcn301/ |
| D | dcn301_resource.c | 174 .socclk_mhz = 278.0,
185 .socclk_mhz = 278.0,
196 .socclk_mhz = 278.0,
208 .socclk_mhz = 715.0,
220 .socclk_mhz = 953.0,
1602 clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn301_update_bw_bounding_box()
1643 pipes[0].clks_cfg.socclk_mhz = dml->soc.clock_limits[vlevel].socclk_mhz; in calculate_wm_set_for_vlevel()
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| D | vg_clk_mgr.c | 512 .socclk_mhz = 0,
519 .socclk_mhz = 0,
526 .socclk_mhz = 0,
533 .socclk_mhz = 0,
|
| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | clk_mgr.h | 89 unsigned int socclk_mhz; member
|
| /drivers/gpu/drm/amd/display/dc/dcn302/ |
| D | dcn302_resource.c | 1410 if (!bw_params->clk_table.entries[i].socclk_mhz && i > 0) in dcn302_update_bw_bounding_box()
1411 dcn3_02_soc.clock_limits[i].socclk_mhz = dcn3_02_soc.clock_limits[i-1].socclk_mhz; in dcn302_update_bw_bounding_box()
1413 dcn3_02_soc.clock_limits[i].socclk_mhz = bw_params->clk_table.entries[i].socclk_mhz; in dcn302_update_bw_bounding_box()
|
| /drivers/gpu/drm/amd/display/dc/dcn303/ |
| D | dcn303_resource.c | 1338 if (!bw_params->clk_table.entries[i].socclk_mhz && i > 0) in dcn303_update_bw_bounding_box()
1339 dcn3_03_soc.clock_limits[i].socclk_mhz = dcn3_03_soc.clock_limits[i-1].socclk_mhz; in dcn303_update_bw_bounding_box()
1341 dcn3_03_soc.clock_limits[i].socclk_mhz = bw_params->clk_table.entries[i].socclk_mhz; in dcn303_update_bw_bounding_box()
|
| /drivers/gpu/drm/amd/display/dc/dcn31/ |
| D | dcn31_resource.c | 1682 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn31_calculate_wm_and_dlg_fp()
1902 clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn31_update_bw_bounding_box()
|
| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_resource.c | 2140 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn30_calculate_wm_and_dlg_fp()
2510 dcn3_0_soc.clock_limits[i].socclk_mhz = dcn3_0_soc.clock_limits[0].socclk_mhz; in dcn30_update_bw_bounding_box()
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| D | dcn30_clk_mgr.c | 195 &clk_mgr_base->bw_params->clk_table.entries[0].socclk_mhz, in dcn3_init_clocks()
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| D | dcn31_clk_mgr.c | 598 …bw_params->clk_table.entries[i].socclk_mhz = find_clk_for_voltage(clock_table, clock_table->SocClo… in dcn31_clk_mgr_helper_populate_bw_params()
|
| /drivers/gpu/drm/amd/display/dc/calcs/ |
| D | dcn_calcs.c | 495 input.clks_cfg.socclk_mhz = v->socclk; in dcn_bw_calc_rq_dlg_ttu()
|