Searched refs:timer2 (Results 1 – 5 of 5) sorted by relevance
| /drivers/clocksource/ |
| D | timer-zevio.c | 51 void __iomem *timer1, *timer2; member
132 timer->timer2 = timer->base + IO_TIMER2; in zevio_timer_add()
186 writel(CNTL_STOP_TIMER, timer->timer2 + IO_CONTROL); in zevio_timer_add()
187 writel(0, timer->timer2 + IO_CURRENT_VAL); in zevio_timer_add()
188 writel(0, timer->timer2 + IO_DIVIDER); in zevio_timer_add()
190 timer->timer2 + IO_CONTROL); in zevio_timer_add()
192 clocksource_mmio_init(timer->timer2 + IO_CURRENT_VAL, in zevio_timer_add()
|
| /drivers/net/wireless/ath/ath5k/ |
| D | pcu.c | 650 u32 timer1, timer2, timer3; in ath5k_hw_init_beacon_timers() local
664 timer2 = 0xffffffff; in ath5k_hw_init_beacon_timers()
667 timer2 = 0x0007ffff; in ath5k_hw_init_beacon_timers()
680 timer2 = (next_beacon - AR5K_TUNE_SW_BEACON_RESP) << 3; in ath5k_hw_init_beacon_timers()
699 ath5k_hw_reg_write(ah, timer2, AR5K_TIMER2); in ath5k_hw_init_beacon_timers()
|
| /drivers/clk/davinci/ |
| D | psc-dm644x.c | 59 LPSC(29, 0, timer2, pll1_auxclk, timer2_clkdev, LPSC_ALWAYS_ENABLED),
|
| D | psc-dm355.c | 65 LPSC(29, 0, timer2, pll1_auxclk, timer2_clkdev, LPSC_ALWAYS_ENABLED),
|
| D | psc-dm365.c | 66 LPSC(29, 0, timer2, pll1_auxclk, timer2_clkdev, LPSC_ALWAYS_ENABLED),
|