| /drivers/media/common/b2c2/ |
| D | flexcop-sram.c | 240 u8 tmp1, tmp2;
246 tmp2 = 0xa5;
249 sram_write(adapter, addr, &tmp2, 1);
252 tmp2 = 0;
255 sram_read(adapter, addr, &tmp2, 1);
256 sram_read(adapter, addr, &tmp2, 1);
258 dprintk("%s: wrote 0xa5, read 0x%2x\n", __func__, tmp2);
260 if (tmp2 != 0xa5)
263 tmp2 = 0x5a;
266 sram_write(adapter, addr, &tmp2, 1);
[all …]
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| /drivers/media/dvb-frontends/ |
| D | ec100.c | 80 u8 tmp, tmp2; in ec100_set_frontend() local
110 tmp2 = 0x55; in ec100_set_frontend()
114 tmp2 = 0x64; in ec100_set_frontend()
119 tmp2 = 0x72; in ec100_set_frontend()
125 ret = ec100_write_reg(state, 0x1c, tmp2); in ec100_set_frontend()
203 u8 tmp, tmp2; in ec100_read_ber() local
211 ret = ec100_read_reg(state, 0x66, &tmp2); in ec100_read_ber()
215 ber2 = (tmp2 << 8) | tmp; in ec100_read_ber()
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| D | tda1004x.c | 1126 int tmp2; in tda1004x_read_ucblocks() local
1142 tmp2 = tda1004x_read_byte(state, TDA1004X_UNCOR); in tda1004x_read_ucblocks()
1143 if (tmp2 < 0) in tda1004x_read_ucblocks()
1145 tmp2 &= 0x7f; in tda1004x_read_ucblocks()
1146 if ((tmp2 < tmp) || (tmp2 == 0)) in tda1004x_read_ucblocks()
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| /drivers/cpufreq/ |
| D | gx-suspmod.c | 334 u8 tmp1, tmp2; in cpufreq_gx_verify() local
349 tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2); in cpufreq_gx_verify()
355 tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2); in cpufreq_gx_verify()
375 u8 tmp1, tmp2; in cpufreq_gx_target() local
383 tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2); in cpufreq_gx_target()
386 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); in cpufreq_gx_target()
390 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); in cpufreq_gx_target()
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| /drivers/watchdog/ |
| D | booke_wdt.c | 63 unsigned long tmp2 = ppc_tb_freq; in period_to_sec() local
68 tmp2 = tmp2 / 5 * 2; in period_to_sec()
70 do_div(tmp, tmp2); in period_to_sec()
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| /drivers/net/ |
| D | mii.c | 261 u32 advert2 = 0, tmp2 = 0; in mii_ethtool_sset() local
276 tmp2 = advert2 & ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL); in mii_ethtool_sset()
281 tmp2 |= in mii_ethtool_sset()
287 if ((mii->supports_gmii) && (advert2 != tmp2)) in mii_ethtool_sset()
288 mii->mdio_write(dev, mii->phy_id, MII_CTRL1000, tmp2); in mii_ethtool_sset()
353 u32 advert2 = 0, tmp2 = 0; in mii_ethtool_set_link_ksettings() local
373 tmp2 = advert2 & in mii_ethtool_set_link_ksettings()
379 tmp2 |= ethtool_adv_to_mii_ctrl1000_t(advertising); in mii_ethtool_set_link_ksettings()
384 if ((mii->supports_gmii) && (advert2 != tmp2)) in mii_ethtool_set_link_ksettings()
385 mii->mdio_write(dev, mii->phy_id, MII_CTRL1000, tmp2); in mii_ethtool_set_link_ksettings()
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| /drivers/video/fbdev/i810/ |
| D | i810_accel.c | 438 u32 tmp1, tmp2; in i810fb_init_ringbuffer() local
447 tmp2 = i810_readl(IRING + 8, mmio) & ~RBUFFER_START_MASK; in i810fb_init_ringbuffer()
449 i810_writel(IRING + 8, mmio, tmp2 | tmp1); in i810fb_init_ringbuffer()
453 tmp2 = (par->iring.size - I810_PAGESIZE) & RBUFFER_SIZE_MASK; in i810fb_init_ringbuffer()
454 i810_writel(IRING + 12, mmio, tmp1 | tmp2); in i810fb_init_ringbuffer()
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| D | i810_main.c | 232 u32 tmp1, tmp2; in i810_load_pll() local
236 tmp2 = i810_readl(DCLK_2D, mmio); in i810_load_pll()
237 tmp2 &= ~MN_MASK; in i810_load_pll()
238 i810_writel(DCLK_2D, mmio, tmp1 | tmp2); in i810_load_pll()
241 tmp2 = i810_readl(DCLK_0DS, mmio); in i810_load_pll()
242 tmp2 &= ~(P_OR << 16); in i810_load_pll()
243 i810_writel(DCLK_0DS, mmio, (tmp1 << 16) | tmp2); in i810_load_pll()
463 u32 tmp1, tmp2; in i810_restore_pll() local
467 tmp2 = i810_readl(DCLK_2D, mmio); in i810_restore_pll()
469 tmp2 &= MN_MASK; in i810_restore_pll()
[all …]
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| /drivers/iio/afe/ |
| D | iio-rescale.c | 55 s64 tmp, tmp2; in rescale_process_offset() local
71 tmp2 = ((s64)scale * 1000000000LL) + scale2; in rescale_process_offset()
72 *val = div64_s64(tmp, tmp2) + schan_off; in rescale_process_offset()
76 tmp2 = ((s64)scale * 1000000LL) + scale2; in rescale_process_offset()
77 *val = div64_s64(tmp, tmp2) + schan_off; in rescale_process_offset()
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| /drivers/net/wireless/broadcom/b43/ |
| D | phy_lp.c | 202 u16 tmp, tmp2; in lpphy_baseband_rev0_1_init() local
332 tmp2 = (tmp & 0x03E0) >> 5; in lpphy_baseband_rev0_1_init()
333 tmp2 |= tmp2 << 5; in lpphy_baseband_rev0_1_init()
334 b43_phy_write(dev, B43_LPPHY_4C3, tmp2); in lpphy_baseband_rev0_1_init()
336 tmp2 = (tmp & 0x1F00) >> 8; in lpphy_baseband_rev0_1_init()
337 tmp2 |= tmp2 << 5; in lpphy_baseband_rev0_1_init()
338 b43_phy_write(dev, B43_LPPHY_4C4, tmp2); in lpphy_baseband_rev0_1_init()
340 tmp2 = tmp & 0x00FF; in lpphy_baseband_rev0_1_init()
341 tmp2 |= tmp << 8; in lpphy_baseband_rev0_1_init()
342 b43_phy_write(dev, B43_LPPHY_4C5, tmp2); in lpphy_baseband_rev0_1_init()
[all …]
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| /drivers/scsi/sym53c8xx_2/ |
| D | sym_fw.c | 350 u32 opcode, new, old, tmp1, tmp2; in sym_fw_bind_script() local
409 tmp2 = cur[2]; in sym_fw_bind_script()
410 if ((tmp1 ^ tmp2) & 3) { in sym_fw_bind_script()
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| /drivers/gpu/drm/ |
| D | drm_modes.c | 231 int tmp1, tmp2; in drm_cvt_mode() local
241 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + in drm_cvt_mode()
243 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); in drm_cvt_mode()
297 int tmp1, tmp2; in drm_cvt_mode() local
301 tmp2 = vdisplay_rnd + 2 * vmargin; in drm_cvt_mode()
302 hperiod = tmp1 / (tmp2 * vfieldrate); in drm_cvt_mode()
397 unsigned int tmp1, tmp2; in drm_gtf_mode_complex() local
446 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * in drm_gtf_mode_complex()
448 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; in drm_gtf_mode_complex()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | uvd_v4_2.c | 633 u32 tmp, tmp2; in uvd_v4_2_set_dcm() local
645 tmp2 = UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK | in uvd_v4_2_set_dcm()
650 tmp2 = 0; in uvd_v4_2_set_dcm()
654 WREG32_UVD_CTX(ixUVD_CGC_CTRL2, tmp2); in uvd_v4_2_set_dcm()
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| D | uvd_v3_1.c | 209 u32 tmp, tmp2; in uvd_v3_1_set_dcm() local
221 tmp2 = UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK | in uvd_v3_1_set_dcm()
226 tmp2 = 0; in uvd_v3_1_set_dcm()
230 WREG32_UVD_CTX(ixUVD_CGC_CTRL2, tmp2); in uvd_v3_1_set_dcm()
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| /drivers/target/iscsi/ |
| D | iscsi_target_parameters.c | 916 char *tmp1 = NULL, *tmp2 = NULL; in iscsi_check_valuelist_for_support() local
935 tmp2 = strchr(acceptor_values, ','); in iscsi_check_valuelist_for_support()
936 if (tmp2) in iscsi_check_valuelist_for_support()
937 *tmp2 = '\0'; in iscsi_check_valuelist_for_support()
939 if (tmp2) in iscsi_check_valuelist_for_support()
940 *tmp2 = ','; in iscsi_check_valuelist_for_support()
943 if (tmp2) in iscsi_check_valuelist_for_support()
944 *tmp2++ = ','; in iscsi_check_valuelist_for_support()
946 acceptor_values = tmp2; in iscsi_check_valuelist_for_support()
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| /drivers/net/ethernet/cavium/liquidio/ |
| D | request_manager.c | 772 struct list_head *tmp, *tmp2; in octeon_free_sc_done_list() local
785 list_for_each_safe(tmp, tmp2, &done_sc_list->head) { in octeon_free_sc_done_list()
811 struct list_head *tmp, *tmp2; in octeon_free_sc_zombie_list() local
819 list_for_each_safe(tmp, tmp2, &zombie_sc_list->head) { in octeon_free_sc_zombie_list()
833 struct list_head *tmp, *tmp2; in octeon_free_sc_buffer_pool() local
840 list_for_each_safe(tmp, tmp2, &oct->sc_buf_pool.head) { in octeon_free_sc_buffer_pool()
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| /drivers/phy/realtek/ |
| D | phy-rtk-usb3.c | 271 u16 tmp1, tmp2; in do_rtk_phy_init() local
274 tmp2 = rx_offset_range & range_mask; in do_rtk_phy_init()
275 tmp2 += (1 << 2); in do_rtk_phy_init()
276 rx_offset_range = tmp1 | (tmp2 & range_mask); in do_rtk_phy_init()
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| /drivers/video/fbdev/aty/ |
| D | mach64_ct.c | 285 u8 tmp, tmp2; in aty_set_pll_ct() local
320 tmp2 = par->clk_wr_offset << 1; in aty_set_pll_ct()
322 tmp &= ~(0x03U << tmp2); in aty_set_pll_ct()
323 tmp |= ((pll->ct.vclk_post_div & 0x03U) << tmp2); in aty_set_pll_ct()
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| D | radeon_pm.c | 1437 u32 tmp, tmp2; in radeon_pm_reset_pad_ctlr_strength() local
1446 tmp2 = INREG(PAD_CTLR_STRENGTH); in radeon_pm_reset_pad_ctlr_strength()
1447 if (tmp != tmp2) { in radeon_pm_reset_pad_ctlr_strength()
1448 tmp = tmp2; in radeon_pm_reset_pad_ctlr_strength()
2217 u32 tmp, tmp2;
2412 tmp2 = INREG(TMDS_TRANSMITTER_CNTL);
2418 OUTREG(TMDS_TRANSMITTER_CNTL, tmp2);
2494 tmp2 = INREG(FP_GEN_CNTL);
2502 tmp2 &= ~2;
2503 tmp2 |= FP_TMDS_EN;
[all …]
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| /drivers/gpu/drm/amd/display/dc/dce120/ |
| D | dce120_timing_generator.c | 433 uint32_t tmp2 = 0; in dce120_timing_generator_program_blanking() local
468 tmp2 = tmp1 + timing->h_addressable + in dce120_timing_generator_program_blanking()
474 CRTC_H_BLANK_START, tmp2); in dce120_timing_generator_program_blanking()
477 tmp2 = tmp1 + timing->v_addressable + timing->v_border_top + in dce120_timing_generator_program_blanking()
483 CRTC_V_BLANK_START, tmp2); in dce120_timing_generator_program_blanking()
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| /drivers/staging/r8188eu/hal/ |
| D | HalPhyRf_8188e.c | 780 s32 tmp1 = 0, tmp2 = 0; in phy_SimularityCompare_8188E() local
802 tmp2 = resulta[c2][i] | 0xFFFFFC00; in phy_SimularityCompare_8188E()
804 tmp2 = resulta[c2][i]; in phy_SimularityCompare_8188E()
807 tmp2 = resulta[c2][i]; in phy_SimularityCompare_8188E()
810 diff = (tmp1 > tmp2) ? (tmp1 - tmp2) : (tmp2 - tmp1); in phy_SimularityCompare_8188E()
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| /drivers/crypto/caam/ |
| D | caampkc.c | 528 pdb->tmp2_dma = dma_map_single(dev, key->tmp2, q_sz, DMA_BIDIRECTIONAL); in set_rsa_priv_f2_pdb()
617 pdb->tmp2_dma = dma_map_single(dev, key->tmp2, q_sz, DMA_BIDIRECTIONAL); in set_rsa_priv_f3_pdb()
870 kfree_sensitive(key->tmp2); in caam_rsa_free_key()
1003 rsa_key->tmp2 = kzalloc(raw_key->q_sz, GFP_DMA | GFP_KERNEL); in caam_rsa_set_priv_key_form()
1004 if (!rsa_key->tmp2) in caam_rsa_set_priv_key_form()
1031 kfree_sensitive(rsa_key->tmp2); in caam_rsa_set_priv_key_form()
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| D | caampkc.h | 80 u8 *tmp2; member
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| /drivers/iio/frequency/ |
| D | ad9523.c | 424 long tmp1, tmp2; in ad9523_set_clock_provider() local
433 tmp2 = st->vco_out_freq[AD9523_VCO2] / freq; in ad9523_set_clock_provider()
435 tmp2 *= freq; in ad9523_set_clock_provider()
436 use_alt_clk_src = (abs(tmp1 - freq) > abs(tmp2 - freq)); in ad9523_set_clock_provider()
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| /drivers/iio/ |
| D | industrialio-core.c | 665 s64 tmp2; in __iio_format_value() local
690 tmp2 = div_s64((s64)vals[0] * 1000000000LL, vals[1]); in __iio_format_value()
692 tmp0 = (int)div_s64_rem(tmp2, 1000000000, &tmp1); in __iio_format_value()
693 if ((tmp2 < 0) && (tmp0 == 0)) in __iio_format_value()
699 tmp2 = shift_right((s64)vals[0] * 1000000000LL, vals[1]); in __iio_format_value()
700 tmp0 = (int)div_s64_rem(tmp2, 1000000000LL, &tmp1); in __iio_format_value()
701 if (tmp0 == 0 && tmp2 < 0) in __iio_format_value()
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