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/drivers/clocksource/
Dtimer-stm32.c62 static void stm32_timer_of_bits_set(struct timer_of *to, int bits) in stm32_timer_of_bits_set() argument
64 struct stm32_timer_private *pd = to->private_data; in stm32_timer_of_bits_set()
78 static int stm32_timer_of_bits_get(struct timer_of *to) in stm32_timer_of_bits_get() argument
80 struct stm32_timer_private *pd = to->private_data; in stm32_timer_of_bits_get()
99 static void stm32_clock_event_disable(struct timer_of *to) in stm32_clock_event_disable() argument
101 writel_relaxed(0, timer_of_base(to) + TIM_DIER); in stm32_clock_event_disable()
112 static void stm32_timer_start(struct timer_of *to) in stm32_timer_start() argument
114 writel_relaxed(TIM_CR1_UDIS | TIM_CR1_CEN, timer_of_base(to) + TIM_CR1); in stm32_timer_start()
119 struct timer_of *to = to_timer_of(clkevt); in stm32_clock_event_shutdown() local
121 stm32_clock_event_disable(to); in stm32_clock_event_shutdown()
[all …]
Dtimer-mediatek.c56 #define SYST_CON_REG(to) (timer_of_base(to) + SYST_CON) argument
57 #define SYST_VAL_REG(to) (timer_of_base(to) + SYST_VAL) argument
75 static void mtk_syst_ack_irq(struct timer_of *to) in mtk_syst_ack_irq() argument
78 writel(SYST_CON_EN, SYST_CON_REG(to)); in mtk_syst_ack_irq()
79 writel(SYST_CON_IRQ_CLR | SYST_CON_EN, SYST_CON_REG(to)); in mtk_syst_ack_irq()
85 struct timer_of *to = to_timer_of(clkevt); in mtk_syst_handler() local
87 mtk_syst_ack_irq(to); in mtk_syst_handler()
96 struct timer_of *to = to_timer_of(clkevt); in mtk_syst_clkevt_next_event() local
99 writel(SYST_CON_EN, SYST_CON_REG(to)); in mtk_syst_clkevt_next_event()
105 writel(ticks, SYST_VAL_REG(to)); in mtk_syst_clkevt_next_event()
[all …]
Drenesas-ostm.c44 static void ostm_timer_stop(struct timer_of *to) in ostm_timer_stop() argument
46 if (readb(timer_of_base(to) + OSTM_TE) & TE) { in ostm_timer_stop()
47 writeb(TT, timer_of_base(to) + OSTM_TT); in ostm_timer_stop()
54 while (readb(timer_of_base(to) + OSTM_TE) & TE) in ostm_timer_stop()
59 static int __init ostm_init_clksrc(struct timer_of *to) in ostm_init_clksrc() argument
61 ostm_timer_stop(to); in ostm_init_clksrc()
63 writel(0, timer_of_base(to) + OSTM_CMP); in ostm_init_clksrc()
64 writeb(CTL_FREERUN, timer_of_base(to) + OSTM_CTL); in ostm_init_clksrc()
65 writeb(TS, timer_of_base(to) + OSTM_TS); in ostm_init_clksrc()
67 return clocksource_mmio_init(timer_of_base(to) + OSTM_CNT, in ostm_init_clksrc()
[all …]
Dtimer-milbeaut.c52 struct timer_of *to = to_timer_of(clk); in mlb_timer_interrupt() local
55 val = readl_relaxed(timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); in mlb_timer_interrupt()
57 writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); in mlb_timer_interrupt()
64 static void mlb_evt_timer_start(struct timer_of *to, bool periodic) in mlb_evt_timer_start() argument
71 writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); in mlb_evt_timer_start()
74 static void mlb_evt_timer_stop(struct timer_of *to) in mlb_evt_timer_stop() argument
76 u32 val = readl_relaxed(timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); in mlb_evt_timer_stop()
79 writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); in mlb_evt_timer_stop()
82 static void mlb_evt_timer_register_count(struct timer_of *to, unsigned long cnt) in mlb_evt_timer_register_count() argument
84 writel_relaxed(cnt, timer_of_base(to) + MLB_TMR_EVT_TMRLR1_OFS); in mlb_evt_timer_register_count()
[all …]
Dtimer-sun4i.c87 struct timer_of *to = to_timer_of(evt); in sun4i_clkevt_shutdown() local
89 sun4i_clkevt_time_stop(timer_of_base(to), 0); in sun4i_clkevt_shutdown()
96 struct timer_of *to = to_timer_of(evt); in sun4i_clkevt_set_oneshot() local
98 sun4i_clkevt_time_stop(timer_of_base(to), 0); in sun4i_clkevt_set_oneshot()
99 sun4i_clkevt_time_start(timer_of_base(to), 0, false); in sun4i_clkevt_set_oneshot()
106 struct timer_of *to = to_timer_of(evt); in sun4i_clkevt_set_periodic() local
108 sun4i_clkevt_time_stop(timer_of_base(to), 0); in sun4i_clkevt_set_periodic()
109 sun4i_clkevt_time_setup(timer_of_base(to), 0, timer_of_period(to)); in sun4i_clkevt_set_periodic()
110 sun4i_clkevt_time_start(timer_of_base(to), 0, true); in sun4i_clkevt_set_periodic()
118 struct timer_of *to = to_timer_of(clkevt); in sun4i_clkevt_next_event() local
[all …]
Dtimer-atcpit100.c125 struct timer_of *to = to_timer_of(clkevt); in atcpit100_clkevt_next_event() local
127 val = readl(timer_of_base(to) + CH_EN); in atcpit100_clkevt_next_event()
128 writel(val & ~CH0TMR0EN, timer_of_base(to) + CH_EN); in atcpit100_clkevt_next_event()
129 writel(evt, timer_of_base(to) + CH0_REL); in atcpit100_clkevt_next_event()
130 writel(val | CH0TMR0EN, timer_of_base(to) + CH_EN); in atcpit100_clkevt_next_event()
137 struct timer_of *to = to_timer_of(evt); in atcpit100_clkevt_set_periodic() local
139 atcpit100_clkevt_time_setup(timer_of_base(to), timer_of_period(to)); in atcpit100_clkevt_set_periodic()
140 atcpit100_clkevt_time_start(timer_of_base(to)); in atcpit100_clkevt_set_periodic()
146 struct timer_of *to = to_timer_of(evt); in atcpit100_clkevt_shutdown() local
148 atcpit100_clkevt_time_stop(timer_of_base(to)); in atcpit100_clkevt_shutdown()
[all …]
Dtimer-of.c24 struct timer_of *to = container_of(of_irq, struct timer_of, of_irq); in timer_of_irq_exit() local
26 struct clock_event_device *clkevt = &to->clkevt; in timer_of_irq_exit()
54 struct timer_of *to = container_of(of_irq, struct timer_of, of_irq); in timer_of_irq_init() local
55 struct clock_event_device *clkevt = &to->clkevt; in timer_of_irq_init()
168 int timer_of_init(struct device_node *np, struct timer_of *to) in timer_of_init() argument
173 if (to->flags & TIMER_OF_BASE) { in timer_of_init()
174 ret = timer_of_base_init(np, &to->of_base); in timer_of_init()
180 if (to->flags & TIMER_OF_CLOCK) { in timer_of_init()
181 ret = timer_of_clk_init(np, &to->of_clk); in timer_of_init()
187 if (to->flags & TIMER_OF_IRQ) { in timer_of_init()
[all …]
Dtimer-npcm7xx.c58 struct timer_of *to = to_timer_of(evt); in npcm7xx_timer_resume() local
61 val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0); in npcm7xx_timer_resume()
63 writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0); in npcm7xx_timer_resume()
70 struct timer_of *to = to_timer_of(evt); in npcm7xx_timer_shutdown() local
73 val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0); in npcm7xx_timer_shutdown()
75 writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0); in npcm7xx_timer_shutdown()
82 struct timer_of *to = to_timer_of(evt); in npcm7xx_timer_oneshot() local
85 val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0); in npcm7xx_timer_oneshot()
88 writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0); in npcm7xx_timer_oneshot()
95 struct timer_of *to = to_timer_of(evt); in npcm7xx_timer_periodic() local
[all …]
/drivers/staging/media/atomisp/pci/isp/kernels/eed1_8/
Dia_css_eed1_8.host.c90 struct eed1_8_vmem_params *to, in ia_css_eed1_8_vmem_encode() argument
102 to->e_dew_enh_x[0][i] = 0; in ia_css_eed1_8_vmem_encode()
103 to->e_dew_enh_y[0][i] = 0; in ia_css_eed1_8_vmem_encode()
104 to->e_dew_enh_a[0][i] = 0; in ia_css_eed1_8_vmem_encode()
105 to->e_dew_enh_f[0][i] = 0; in ia_css_eed1_8_vmem_encode()
106 to->chgrinv_x[0][i] = 0; in ia_css_eed1_8_vmem_encode()
107 to->chgrinv_a[0][i] = 0; in ia_css_eed1_8_vmem_encode()
108 to->chgrinv_b[0][i] = 0; in ia_css_eed1_8_vmem_encode()
109 to->chgrinv_c[0][i] = 0; in ia_css_eed1_8_vmem_encode()
110 to->tcinv_x[0][i] = 0; in ia_css_eed1_8_vmem_encode()
[all …]
/drivers/gpu/drm/amd/display/dc/dsc/
Drc_calc_dpi.c29 static void copy_pps_fields(struct drm_dsc_config *to, const struct drm_dsc_config *from) in copy_pps_fields() argument
31 to->line_buf_depth = from->line_buf_depth; in copy_pps_fields()
32 to->bits_per_component = from->bits_per_component; in copy_pps_fields()
33 to->convert_rgb = from->convert_rgb; in copy_pps_fields()
34 to->slice_width = from->slice_width; in copy_pps_fields()
35 to->slice_height = from->slice_height; in copy_pps_fields()
36 to->simple_422 = from->simple_422; in copy_pps_fields()
37 to->native_422 = from->native_422; in copy_pps_fields()
38 to->native_420 = from->native_420; in copy_pps_fields()
39 to->pic_width = from->pic_width; in copy_pps_fields()
[all …]
/drivers/staging/media/atomisp/pci/isp/kernels/bnlm/
Dia_css_bnlm.host.c99 struct bnlm_vmem_params *to, in ia_css_bnlm_vmem_encode() argument
107 bnlm_lut_encode(&to->mu_root_lut, from->mu_root_lut_thr, from->mu_root_lut_val, in ia_css_bnlm_vmem_encode()
109 bnlm_lut_encode(&to->sad_norm_lut, from->sad_norm_lut_thr, in ia_css_bnlm_vmem_encode()
111 bnlm_lut_encode(&to->sig_detail_lut, from->sig_detail_lut_thr, in ia_css_bnlm_vmem_encode()
113 bnlm_lut_encode(&to->sig_rad_lut, from->sig_rad_lut_thr, from->sig_rad_lut_val, in ia_css_bnlm_vmem_encode()
115 bnlm_lut_encode(&to->rad_pow_lut, from->rad_pow_lut_thr, from->rad_pow_lut_val, in ia_css_bnlm_vmem_encode()
117 bnlm_lut_encode(&to->nl_0_lut, from->nl_0_lut_thr, from->nl_0_lut_val, 16); in ia_css_bnlm_vmem_encode()
118 bnlm_lut_encode(&to->nl_1_lut, from->nl_1_lut_thr, from->nl_1_lut_val, 16); in ia_css_bnlm_vmem_encode()
119 bnlm_lut_encode(&to->nl_2_lut, from->nl_2_lut_thr, from->nl_2_lut_val, 16); in ia_css_bnlm_vmem_encode()
120 bnlm_lut_encode(&to->nl_3_lut, from->nl_3_lut_thr, from->nl_3_lut_val, 16); in ia_css_bnlm_vmem_encode()
[all …]
/drivers/tty/vt/
Ddefkeymap.map12 # be saved by mapping AltGr to Alt (and adapting a few entries):
291 compose '`' 'A' to '�'
292 compose '`' 'a' to '�'
293 compose '\'' 'A' to '�'
294 compose '\'' 'a' to '�'
295 compose '^' 'A' to '�'
296 compose '^' 'a' to '�'
297 compose '~' 'A' to '�'
298 compose '~' 'a' to '�'
299 compose '"' 'A' to '�'
[all …]
/drivers/staging/media/atomisp/pci/isp/kernels/ob/ob_1.0/
Dia_css_ob.host.c48 struct sh_css_isp_ob_params *to, in ia_css_ob_encode() argument
60 to->blacklevel_gr = from->level_gr >> scale; in ia_css_ob_encode()
61 to->blacklevel_r = from->level_r >> scale; in ia_css_ob_encode()
62 to->blacklevel_b = from->level_b >> scale; in ia_css_ob_encode()
63 to->blacklevel_gb = from->level_gb >> scale; in ia_css_ob_encode()
64 to->area_start_bq = 0; in ia_css_ob_encode()
65 to->area_length_bq = 0; in ia_css_ob_encode()
66 to->area_length_bq_inverse = 0; in ia_css_ob_encode()
69 to->blacklevel_gr = 0; in ia_css_ob_encode()
70 to->blacklevel_r = 0; in ia_css_ob_encode()
[all …]
/drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr2_2/
Dia_css_bnr2_2.host.c52 struct sh_css_isp_bnr2_2_params *to, in ia_css_bnr2_2_encode() argument
57 to->d_var_gain_r = from->d_var_gain_r; in ia_css_bnr2_2_encode()
58 to->d_var_gain_g = from->d_var_gain_g; in ia_css_bnr2_2_encode()
59 to->d_var_gain_b = from->d_var_gain_b; in ia_css_bnr2_2_encode()
60 to->d_var_gain_slope_r = from->d_var_gain_slope_r; in ia_css_bnr2_2_encode()
61 to->d_var_gain_slope_g = from->d_var_gain_slope_g; in ia_css_bnr2_2_encode()
62 to->d_var_gain_slope_b = from->d_var_gain_slope_b; in ia_css_bnr2_2_encode()
64 to->n_var_gain_r = from->n_var_gain_r; in ia_css_bnr2_2_encode()
65 to->n_var_gain_g = from->n_var_gain_g; in ia_css_bnr2_2_encode()
66 to->n_var_gain_b = from->n_var_gain_b; in ia_css_bnr2_2_encode()
[all …]
/drivers/net/fddi/skfp/
Dpmf.c552 char *to ; in smt_add_para() local
575 to = (char *) (pcon->pc_p) ; /* destination pointer */ in smt_add_para()
578 pa = (struct smt_para *) to ; /* type/length pointer */ in smt_add_para()
579 to += PARA_LEN ; /* skip smt_para */ in smt_add_para()
588 to[0] = 0 ; in smt_add_para()
589 to[1] = 0 ; in smt_add_para()
590 to[2] = 0 ; in smt_add_para()
591 to[3] = index ; in smt_add_para()
593 to += 4 ; in smt_add_para()
668 *(u32 *)to = 0 ; in smt_add_para()
[all …]
/drivers/staging/media/atomisp/pci/isp/kernels/tdf/tdf_1.0/
Dia_css_tdf.host.c32 struct ia_css_isp_tdf_vmem_params *to, in ia_css_tdf_vmem_encode() argument
40 to->pyramid[0][i] = g_pyramid[i / 8][i % 8]; in ia_css_tdf_vmem_encode()
41 to->threshold_flat[0][i] = from->thres_flat_table[i]; in ia_css_tdf_vmem_encode()
42 to->threshold_detail[0][i] = from->thres_detail_table[i]; in ia_css_tdf_vmem_encode()
48 struct ia_css_isp_tdf_dmem_params *to, in ia_css_tdf_encode() argument
53 to->Epsilon_0 = from->epsilon_0; in ia_css_tdf_encode()
54 to->Epsilon_1 = from->epsilon_1; in ia_css_tdf_encode()
55 to->EpsScaleText = from->eps_scale_text; in ia_css_tdf_encode()
56 to->EpsScaleEdge = from->eps_scale_edge; in ia_css_tdf_encode()
57 to->Sepa_flat = from->sepa_flat; in ia_css_tdf_encode()
[all …]
/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc1_5/
Dia_css_ctc1_5.host.c74 struct sh_css_isp_ctc_params *to, in ia_css_ctc_encode() argument
79 to->y0 = from->y0; in ia_css_ctc_encode()
80 to->y1 = from->y1; in ia_css_ctc_encode()
81 to->y2 = from->y2; in ia_css_ctc_encode()
82 to->y3 = from->y3; in ia_css_ctc_encode()
83 to->y4 = from->y4; in ia_css_ctc_encode()
84 to->y5 = from->y5; in ia_css_ctc_encode()
86 to->ce_gain_exp = from->ce_gain_exp; in ia_css_ctc_encode()
88 to->x1 = from->x1; in ia_css_ctc_encode()
89 to->x2 = from->x2; in ia_css_ctc_encode()
[all …]
/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc2/
Dia_css_ctc2.host.c79 void ia_css_ctc2_vmem_encode(struct ia_css_isp_ctc2_vmem_params *to, in ia_css_ctc2_vmem_encode() argument
114 to->y_x[0][(i << shffl_blck)] = 0; in ia_css_ctc2_vmem_encode()
115 to->y_x[0][(i << shffl_blck) + 1] = from->y_x1; in ia_css_ctc2_vmem_encode()
116 to->y_x[0][(i << shffl_blck) + 2] = from->y_x2; in ia_css_ctc2_vmem_encode()
117 to->y_x[0][(i << shffl_blck) + 3] = from->y_x3; in ia_css_ctc2_vmem_encode()
118 to->y_x[0][(i << shffl_blck) + 4] = from->y_x4; in ia_css_ctc2_vmem_encode()
120 to->y_y[0][(i << shffl_blck)] = from->y_y0; in ia_css_ctc2_vmem_encode()
121 to->y_y[0][(i << shffl_blck) + 1] = from->y_y1; in ia_css_ctc2_vmem_encode()
122 to->y_y[0][(i << shffl_blck) + 2] = from->y_y2; in ia_css_ctc2_vmem_encode()
123 to->y_y[0][(i << shffl_blck) + 3] = from->y_y3; in ia_css_ctc2_vmem_encode()
[all …]
/drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_2/
Dia_css_ynr2.host.c48 struct sh_css_isp_yee2_params *to, in ia_css_ynr_encode() argument
53 to->edge_sense_gain_0 = from->edge_sense_gain_0; in ia_css_ynr_encode()
54 to->edge_sense_gain_1 = from->edge_sense_gain_1; in ia_css_ynr_encode()
55 to->corner_sense_gain_0 = from->corner_sense_gain_0; in ia_css_ynr_encode()
56 to->corner_sense_gain_1 = from->corner_sense_gain_1; in ia_css_ynr_encode()
61 struct sh_css_isp_fc_params *to, in ia_css_fc_encode() argument
66 to->gain_exp = from->gain_exp; in ia_css_fc_encode()
68 to->coring_pos_0 = from->coring_pos_0; in ia_css_fc_encode()
69 to->coring_pos_1 = from->coring_pos_1; in ia_css_fc_encode()
70 to->coring_neg_0 = from->coring_neg_0; in ia_css_fc_encode()
[all …]
/drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_1.0/
Dia_css_ynr.host.c40 struct sh_css_isp_ynr_params *to, in ia_css_nr_encode() argument
46 to->threshold = in ia_css_nr_encode()
48 to->gain_all = in ia_css_nr_encode()
50 to->gain_dir = in ia_css_nr_encode()
52 to->threshold_cb = in ia_css_nr_encode()
54 to->threshold_cr = in ia_css_nr_encode()
60 struct sh_css_isp_yee_params *to, in ia_css_yee_encode() argument
70 to->dirthreshold_s = in ia_css_yee_encode()
74 to->dirthreshold_g = in ia_css_yee_encode()
78 to->dirthreshold_width_log2 = in ia_css_yee_encode()
[all …]
/drivers/message/fusion/lsi/
Dmpi_history.txt48 * 01-09-01 01.01.03 Added more definitions to the system interface section
50 * 01-25-01 01.01.04 Changed MPI_VERSION_MINOR from 0x00 to 0x01.
58 * MPI_DOORBELL_USED, to better match the spec.
60 * Changed MPI_VERSION_MINOR from 0x01 to 0x02.
63 * 11-01-01 01.02.03 Changed name to MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR.
107 * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
112 * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure.
116 * _MSG_EVENT_ACK_REPLY structure to match specification.
118 * Added a value for Manufacturer to WhoInit
123 * Added ImageType to FwUpload reply.
[all …]
/drivers/gpu/drm/i915/
DKconfig.profile8 Beware setting this value lower, or close to heartbeat interval
9 rounded to whole seconds times three, in order to avoid allowing
13 May be 0 to disable the timeout.
19 When listening to a foreign fence, we install a supplementary timer
20 to ensure that we are always signaled and our userspace is able to
24 May be 0 to disable the timeout, and rely on the foreign fence being
31 On runtime suspend, as we suspend the device, we have to revoke
32 userspace GGTT mmaps and force userspace to take a pagefault on
38 May be 0 to disable the extra delay and solely use the device level
45 The driver sends a periodic heartbeat down all active engines to
[all …]
/drivers/staging/most/Documentation/
Ddriver_usage.txt8 MOST defines the protocol, hardware and software layers necessary to allow
12 also supports various speed grades up to 150 Mbps.
16 Cars continue to evolve into sophisticated consumer electronics platforms,
17 increasing the demand for reliable and simple solutions to support audio,
18 video and data communications. MOST can be used to connect multiple
19 consumer devices via optical or electrical physical layers directly to one
22 audio/video streaming. Therefore, the driver perfectly fits to the mission
23 of Automotive Grade Linux to create open source software solutions for
26 The MOST driver uses module stacking to divide the associated modules into
36 arbitrarily combined with the core to meet the connectivity of the desired
[all …]
/drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_2/
Dia_css_gc2.host.c39 struct sh_css_isp_csc_params *to, in ia_css_yuv2rgb_encode() argument
43 ia_css_encode_cc(to, from, size); in ia_css_yuv2rgb_encode()
48 struct sh_css_isp_csc_params *to, in ia_css_rgb2yuv_encode() argument
52 ia_css_encode_cc(to, from, size); in ia_css_rgb2yuv_encode()
57 struct sh_css_isp_rgb_gamma_vamem_params *to, in ia_css_r_gamma_vamem_encode() argument
62 memcpy(&to->gc, &from->data, sizeof(to->gc)); in ia_css_r_gamma_vamem_encode()
67 struct sh_css_isp_rgb_gamma_vamem_params *to, in ia_css_g_gamma_vamem_encode() argument
72 memcpy(&to->gc, &from->data, sizeof(to->gc)); in ia_css_g_gamma_vamem_encode()
77 struct sh_css_isp_rgb_gamma_vamem_params *to, in ia_css_b_gamma_vamem_encode() argument
82 memcpy(&to->gc, &from->data, sizeof(to->gc)); in ia_css_b_gamma_vamem_encode()
/drivers/net/wireless/marvell/mwifiex/
DREADME8 # is available by writing to the Free Software Foundation, Inc.,
23 a) Copy sd8787.bin to /lib/firmware/mrvl/ directory,
46 The above command can be used to connect to an AP with a particular SSID.
49 …Note: Every time before connecting to an AP scan command (iw dev mlan0 scan) should be used by use…
52 This command will be used to disconnect from an AP.
56 The command will be used to join or create an ibss. Optionally, operating frequency,
61 The command will be used to leave an ibss network.
64 The command will be used to get the connection status. The command will return parameters
76 Mount debugfs to /debugfs mount point:
84 The command will be used to change the regulatory domain.
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