| /drivers/net/wireless/mediatek/mt7601u/ |
| D | init.c | 174 u32 *vals; in mt7601u_init_wcid_mem() local
177 vals = kmalloc(sizeof(*vals) * N_WCIDS * 2, GFP_KERNEL); in mt7601u_init_wcid_mem()
178 if (!vals) in mt7601u_init_wcid_mem()
182 vals[i * 2] = 0xffffffff; in mt7601u_init_wcid_mem()
183 vals[i * 2 + 1] = 0x00ffffff; in mt7601u_init_wcid_mem()
187 vals, N_WCIDS * 2); in mt7601u_init_wcid_mem()
188 kfree(vals); in mt7601u_init_wcid_mem()
195 u32 vals[4] = {}; in mt7601u_init_key_mem() local
198 vals, ARRAY_SIZE(vals)); in mt7601u_init_key_mem()
203 u32 *vals; in mt7601u_init_wcid_attr_mem() local
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| /drivers/iio/orientation/ |
| D | hid-sensor-rotation.c | 68 int size, int *vals, int *val_len, in dev_rot_read_raw() argument
75 vals[0] = 0; in dev_rot_read_raw()
76 vals[1] = 0; in dev_rot_read_raw()
82 vals[i] = rot_state->scan.sampled_vals[i]; in dev_rot_read_raw()
89 vals[0] = rot_state->scale_pre_decml; in dev_rot_read_raw()
90 vals[1] = rot_state->scale_post_decml; in dev_rot_read_raw()
94 *vals = rot_state->value_offset; in dev_rot_read_raw()
99 &rot_state->common_attributes, &vals[0], &vals[1]); in dev_rot_read_raw()
103 &rot_state->common_attributes, &vals[0], &vals[1]); in dev_rot_read_raw()
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| /drivers/iio/ |
| D | industrialio-core.c | 662 int size, const int *vals) in __iio_format_value() argument
670 return sysfs_emit_at(buf, offset, "%d", vals[0]); in __iio_format_value()
675 if (vals[1] < 0) in __iio_format_value()
677 abs(vals[0]), -vals[1], in __iio_format_value()
680 return sysfs_emit_at(buf, offset, "%d.%06u%s", vals[0], in __iio_format_value()
681 vals[1], scale_db ? " dB" : ""); in __iio_format_value()
683 if (vals[1] < 0) in __iio_format_value()
685 abs(vals[0]), -vals[1]); in __iio_format_value()
687 return sysfs_emit_at(buf, offset, "%d.%09u", vals[0], in __iio_format_value()
688 vals[1]); in __iio_format_value()
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| D | inkern.c | 521 int vals[INDIO_MAX_RAW_ELEMENTS]; in iio_channel_read() local
534 vals, &val_len, info); in iio_channel_read()
535 *val = vals[0]; in iio_channel_read()
536 *val2 = vals[1]; in iio_channel_read()
754 const int **vals, int *type, int *length, in iio_channel_read_avail() argument
761 vals, type, length, info); in iio_channel_read_avail()
765 const int **vals, int *type, int *length, in iio_read_avail_channel_attribute() argument
777 ret = iio_channel_read_avail(chan, vals, type, length, attribute); in iio_read_avail_channel_attribute()
786 const int **vals, int *length) in iio_read_avail_channel_raw() argument
791 ret = iio_read_avail_channel_attribute(chan, vals, &type, length, in iio_read_avail_channel_raw()
[all …]
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| /drivers/clk/uniphier/ |
| D | clk-uniphier-mux.c | 18 const unsigned int *vals; member
28 mux->vals[index]); in uniphier_clk_mux_set_parent()
44 if ((mux->masks[i] & val) == mux->vals[i]) in uniphier_clk_mux_get_parent()
78 mux->vals = data->vals; in uniphier_clk_register_mux()
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| /drivers/iio/light/ |
| D | cm32181.c | 142 u64 vals[CPM0_HEADER_SIZE + CM32181_CONF_REG_NUM]; in cm32181_acpi_parse_cpm_tables() local
146 count = cm32181_acpi_get_cpm(dev, "CPM0", vals, ARRAY_SIZE(vals)); in cm32181_acpi_parse_cpm_tables()
152 cm32181->init_regs_bitmap = vals[CPM0_REGS_BITMAP]; in cm32181_acpi_parse_cpm_tables()
155 cm32181->conf_regs[i] = vals[CPM0_HEADER_SIZE + i]; in cm32181_acpi_parse_cpm_tables()
157 count = cm32181_acpi_get_cpm(dev, "CPM1", vals, ARRAY_SIZE(vals)); in cm32181_acpi_parse_cpm_tables()
161 cm32181->lux_per_bit = vals[CPM1_LUX_PER_BIT]; in cm32181_acpi_parse_cpm_tables()
164 if (vals[CPM1_CALIBSCALE] == CM32181_CALIBSCALE_DEFAULT) in cm32181_acpi_parse_cpm_tables()
167 cm32181->calibscale = vals[CPM1_CALIBSCALE]; in cm32181_acpi_parse_cpm_tables()
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| /drivers/pinctrl/ |
| D | pinctrl-single.c | 93 struct pcs_func_vals *vals; member
385 struct pcs_func_vals *vals; in pcs_set_mux() local
389 vals = &func->vals[i]; in pcs_set_mux()
391 val = pcs->read(vals->reg); in pcs_set_mux()
394 mask = vals->mask; in pcs_set_mux()
399 val |= (vals->val & mask); in pcs_set_mux()
400 pcs->write(val, vals->reg); in pcs_set_mux()
779 struct pcs_func_vals *vals, in pcs_add_function() argument
791 function->vals = vals; in pcs_add_function()
1005 struct pcs_func_vals *vals; in pcs_parse_one_pinctrl_entry() local
[all …]
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| /drivers/net/ethernet/netronome/nfp/ |
| D | nfp_net_debugfs.c | 43 rxd->vals[0], rxd->vals[1]); in nfp_rx_q_show()
108 txd->vals[0], txd->vals[1], in nfp_tx_q_show()
109 txd->vals[2], txd->vals[3]); in nfp_tx_q_show()
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| /drivers/input/ |
| D | input.c | 105 struct input_value *vals, unsigned int count) in input_to_handler() argument
108 struct input_value *end = vals; in input_to_handler()
112 for (v = vals; v != vals + count; v++) { in input_to_handler()
119 count = end - vals; in input_to_handler()
126 handler->events(handle, vals, count); in input_to_handler()
128 for (v = vals; v != vals + count; v++) in input_to_handler()
140 struct input_value *vals, unsigned int count) in input_pass_values() argument
152 count = input_to_handler(handle, vals, count); in input_pass_values()
156 count = input_to_handler(handle, vals, count); in input_pass_values()
166 for (v = vals; v != vals + count; v++) { in input_pass_values()
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| D | evdev.c | 249 const struct input_value *vals, unsigned int count, in evdev_pass_values() argument
267 for (v = vals; v != vals + count; v++) { in evdev_pass_values()
296 const struct input_value *vals, unsigned int count) in evdev_events() argument
307 evdev_pass_values(client, vals, count, ev_time); in evdev_events()
310 evdev_pass_values(client, vals, count, ev_time); in evdev_events()
321 struct input_value vals[] = { { type, code, value } }; in evdev_event() local
323 evdev_events(handle, vals, 1); in evdev_event()
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| /drivers/phy/hisilicon/ |
| D | phy-histb-combphy.c | 198 u32 vals[3]; in histb_combphy_probe() local
225 vals, ARRAY_SIZE(vals)); in histb_combphy_probe()
232 mode->reg = vals[0]; in histb_combphy_probe()
233 mode->shift = vals[1]; in histb_combphy_probe()
234 mode->mask = vals[2]; in histb_combphy_probe()
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| /drivers/net/ethernet/chelsio/cxgb4vf/ |
| D | t4vf_hw.c | 623 const u32 *params, u32 *vals) in t4vf_query_params() argument
646 *vals++ = be32_to_cpu(p->val); in t4vf_query_params()
661 const u32 *params, const u32 *vals) in t4vf_set_params() argument
680 p->val = cpu_to_be32(*vals++); in t4vf_set_params()
850 u32 params[7], vals[7]; in t4vf_get_sge_params() local
867 v = t4vf_query_params(adapter, 7, params, vals); in t4vf_get_sge_params()
870 sge_params->sge_control = vals[0]; in t4vf_get_sge_params()
871 sge_params->sge_host_page_size = vals[1]; in t4vf_get_sge_params()
872 sge_params->sge_fl_buffer_size[0] = vals[2]; in t4vf_get_sge_params()
873 sge_params->sge_fl_buffer_size[1] = vals[3]; in t4vf_get_sge_params()
[all …]
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| /drivers/cpufreq/ |
| D | s3c24xx-cpufreq.c | 628 struct cpufreq_frequency_table *vals; in s3c_plltab_register() local
631 size = sizeof(*vals) * (plls_no + 1); in s3c_plltab_register()
633 vals = kzalloc(size, GFP_KERNEL); in s3c_plltab_register()
634 if (vals) { in s3c_plltab_register()
635 memcpy(vals, plls, size); in s3c_plltab_register()
636 pll_reg = vals; in s3c_plltab_register()
640 vals += plls_no; in s3c_plltab_register()
641 vals->frequency = CPUFREQ_TABLE_END; in s3c_plltab_register()
647 return vals ? 0 : -ENOMEM; in s3c_plltab_register()
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| /drivers/media/i2c/ |
| D | saa717x.c | 815 } vals[] = { in set_h_prescale() local
828 static const int count = ARRAY_SIZE(vals); in set_h_prescale()
833 if (vals[i].xpsc == prescale) in set_h_prescale()
839 saa717x_write(sd, 0x60 + task_shift, vals[i].xpsc); in set_h_prescale()
841 saa717x_write(sd, 0x61 + task_shift, vals[i].xacl); in set_h_prescale()
844 (vals[i].xc2_1 << 3) | vals[i].xdcg); in set_h_prescale()
847 (vals[i].vpfy << 2) | vals[i].vpfy); in set_h_prescale()
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| D | imx214.c | 656 u8 vals[2]; in imx214_set_ctrl() local
668 vals[1] = ctrl->val; in imx214_set_ctrl()
669 vals[0] = ctrl->val >> 8; in imx214_set_ctrl()
670 ret = regmap_bulk_write(imx214->regmap, 0x202, vals, 2); in imx214_set_ctrl()
693 u8 vals[MAX_CMD]; in imx214_write_table() local
707 vals[i] = table[i].val; in imx214_write_table()
710 ret = regmap_bulk_write(imx214->regmap, table->addr, vals, i); in imx214_write_table()
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| D | ov2640.c | 655 const struct regval_list *vals) in ov2640_write_array() argument
659 while ((vals->reg_num != 0xff) || (vals->value != 0xff)) { in ov2640_write_array()
661 vals->reg_num, vals->value); in ov2640_write_array()
663 vals->reg_num, vals->value); in ov2640_write_array()
667 vals++; in ov2640_write_array()
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| /drivers/net/wireless/mediatek/mt76/mt76x2/ |
| D | init.c | 80 static const struct mt76_reg_pair vals[] = { in mt76_write_mac_initvals() local
146 mt76_wr_rp(dev, 0, vals, ARRAY_SIZE(vals)); in mt76_write_mac_initvals()
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| /drivers/iio/magnetometer/ |
| D | mag3110.c | 119 const int (*vals)[2], int n) in mag3110_show_int_plus_micros()
125 "%d.%06d ", vals[n][0], vals[n][1]); in mag3110_show_int_plus_micros()
133 static int mag3110_get_int_plus_micros_index(const int (*vals)[2], int n, in mag3110_get_int_plus_micros_index()
137 if (val == vals[n][0] && val2 == vals[n][1]) in mag3110_get_int_plus_micros_index()
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| /drivers/nvmem/ |
| D | bcm-ocotp.c | 132 static const u32 vals[] = OTPC_PROG_EN_SEQ; in enable_ocotp_program() local
138 for (i = 0; i < ARRAY_SIZE(vals); i++) { in enable_ocotp_program()
139 write_cpu_data(base, vals[i]); in enable_ocotp_program()
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| /drivers/iio/potentiometer/ |
| D | tpl0102.c | 86 const int **vals, int *type, int *length, in tpl0102_read_avail() argument
94 *vals = data->cfg->avail; in tpl0102_read_avail()
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| /drivers/iio/accel/ |
| D | cros_ec_accel_legacy.c | 146 const int **vals, in cros_ec_accel_legacy_read_avail() argument
154 *vals = cros_ec_legacy_sample_freq; in cros_ec_accel_legacy_read_avail()
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| D | sca3300.c | 382 const int **vals, int *type, int *length, in sca3300_read_avail() argument
387 *vals = (const int *)sca3300_accel_scale; in sca3300_read_avail()
392 *vals = &sca3300_lp_freq[2]; in sca3300_read_avail()
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| /drivers/iio/health/ |
| D | afe4403.c | 144 int vals[2]; in afe440x_show_register() local
154 vals[0] = afe440x_attr->val_table[reg_val].integer; in afe440x_show_register()
155 vals[1] = afe440x_attr->val_table[reg_val].fract; in afe440x_show_register()
157 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals); in afe440x_show_register()
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| D | afe4404.c | 175 int vals[2]; in afe440x_show_register() local
185 vals[0] = afe440x_attr->val_table[reg_val].integer; in afe440x_show_register()
186 vals[1] = afe440x_attr->val_table[reg_val].fract; in afe440x_show_register()
188 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals); in afe440x_show_register()
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| /drivers/iio/dac/ |
| D | dpot-dac.c | 97 const int **vals, int *type, int *length, in dpot_dac_read_avail() argument
105 return iio_read_avail_channel_raw(dac->dpot, vals, length); in dpot_dac_read_avail()
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