Searched refs:vert_c (Results 1 – 9 of 9) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_dpp_dscl.c | 183 && data->ratios.vert_c.value == one in dpp1_dscl_get_dscl_mode()
195 if (data->ratios.horz_c.value == one && data->ratios.vert_c.value == one) in dpp1_dscl_get_dscl_mode()
365 scl_data->taps.v_taps_c, scl_data->ratios.vert_c); in dpp1_dscl_set_scl_filter()
503 int ceil_vratio_c = dc_fixpt_ceil(scl_data->ratios.vert_c); in dpp1_dscl_find_lb_memory_config()
615 SCL_V_SCALE_RATIO_C, dc_fixpt_u3d19(data->ratios.vert_c) << 5); in dpp1_dscl_set_manual_ratio_init()
655 struct fixed31_32 bot = dc_fixpt_add(data->inits.v_c, data->ratios.vert_c); in dpp1_dscl_set_manual_ratio_init()
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| D | dcn10_dpp.c | 158 if (scl_data->ratios.vert_c.value == (4ll << 32)) in dpp1_get_optimal_number_of_taps()
159 scl_data->ratios.vert_c.value--; in dpp1_get_optimal_number_of_taps()
189 if (IDENTITY_RATIO(scl_data->ratios.vert_c)) in dpp1_get_optimal_number_of_taps()
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| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_dpp.c | 414 if (dc_fixpt_ceil(scl_data->ratios.vert_c) > 1) in dpp3_get_optimal_number_of_taps()
415 scl_data->taps.v_taps_c = min(dc_fixpt_ceil(dc_fixpt_mul_int(scl_data->ratios.vert_c, 2)), 8); in dpp3_get_optimal_number_of_taps()
433 min_taps_c = dc_fixpt_ceil(scl_data->ratios.vert_c); in dpp3_get_optimal_number_of_taps()
450 if (dc_fixpt_ceil(scl_data->ratios.vert_c) > 2) in dpp3_get_optimal_number_of_taps()
451 max_taps_c = num_part_c - (dc_fixpt_ceil(scl_data->ratios.vert_c) - 2); in dpp3_get_optimal_number_of_taps()
473 if (IDENTITY_RATIO(scl_data->ratios.vert_c)) in dpp3_get_optimal_number_of_taps()
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| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | transform.h | 145 struct fixed31_32 vert_c; member
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| /drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_transform_v.c | 383 dc_fixpt_u2d19(data->ratios.vert_c) << 5; in calculate_inits()
563 coeffs_v_c = get_filter_coeffs_64p(data->taps.v_taps_c, data->ratios.vert_c); in dce110_xfmv_set_scaler()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_resource.c | 726 …data->viewport_c.height = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.vert_c, data->recout.height)… in calculate_viewport_size()
841 pipe_ctx->plane_res.scl_data.ratios.vert_c = pipe_ctx->plane_res.scl_data.ratios.vert; in calculate_scaling_ratios()
846 pipe_ctx->plane_res.scl_data.ratios.vert_c.value /= 2; in calculate_scaling_ratios()
854 pipe_ctx->plane_res.scl_data.ratios.vert_c = dc_fixpt_truncate( in calculate_scaling_ratios()
855 pipe_ctx->plane_res.scl_data.ratios.vert_c, 19); in calculate_scaling_ratios()
1004 data->ratios.vert_c, in calculate_inits_and_viewports()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_transform.c | 1197 scl_data->taps.v_taps_c = decide_taps(scl_data->ratios.vert_c, in_taps->v_taps, true); in dce_transform_get_optimal_number_of_taps()
1211 if (!IDENTITY_RATIO(scl_data->ratios.vert_c)) { in dce_transform_get_optimal_number_of_taps()
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 2310 …pipes[pipe_cnt].pipe.scale_ratio_depth.vscl_ratio_c = (double) scl->ratios.vert_c.value / (1ULL<<3… in dcn20_populate_dml_pipes_from_context()
2314 || scl->ratios.vert_c.value != dc_fixpt_one.value in dcn20_populate_dml_pipes_from_context()
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| /drivers/gpu/drm/amd/display/dc/calcs/ |
| D | dcn_calcs.c | 408 input->scale_ratio_depth.vscl_ratio_c = pipe->plane_res.scl_data.ratios.vert_c.value/4294967296.0; in pipe_ctx_to_e2e_pipe_params()
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