Searched refs:vlv (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/i915/ |
| D | intel_pm.c | 473 dev_priv->wm.vlv.cxsr = enable; in intel_set_memory_cxsr()
504 struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state; in vlv_get_fifo_size()
1721 &crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2]; in vlv_compute_fifo()
1722 struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state; in vlv_compute_fifo()
1836 struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level]; in vlv_raw_plane_wm_set()
1861 struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level]; in vlv_raw_plane_wm_compute()
1880 crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2].plane[plane_id], in vlv_raw_plane_wm_compute()
1881 crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id], in vlv_raw_plane_wm_compute()
1882 crtc_state->wm.vlv.raw[VLV_WM_LEVEL_DDR_DVFS].plane[plane_id]); in vlv_raw_plane_wm_compute()
1891 &crtc_state->wm.vlv.raw[level]; in vlv_raw_plane_wm_is_valid()
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| D | i915_drv.h | 1124 struct vlv_wm_values vlv; member
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| /drivers/gpu/drm/i915/display/ |
| D | intel_display_power.h | 212 } vlv; member
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| D | intel_display_power.c | 1294 int pw_idx = power_well->desc->vlv.idx; in vlv_set_power_well()
1343 int pw_idx = power_well->desc->vlv.idx; in vlv_power_well_enabled()
3288 .vlv.idx = PUNIT_PWGT_IDX_DISP2D,
3300 .vlv.idx = PUNIT_PWGT_IDX_DPIO_TX_B_LANES_01,
3312 .vlv.idx = PUNIT_PWGT_IDX_DPIO_TX_B_LANES_23,
3324 .vlv.idx = PUNIT_PWGT_IDX_DPIO_TX_C_LANES_01,
3336 .vlv.idx = PUNIT_PWGT_IDX_DPIO_TX_C_LANES_23,
3345 .vlv.idx = PUNIT_PWGT_IDX_DPIO_CMN_BC,
3375 .vlv.idx = PUNIT_PWGT_IDX_DPIO_CMN_BC,
3384 .vlv.idx = PUNIT_PWGT_IDX_DPIO_CMN_D,
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| D | intel_display_types.h | 867 } vlv; member
1297 struct vlv_wm_state vlv; member
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