/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_display.c | 84 int vpos, hpos; in amdgpu_display_flip_work_func() local 98 &vpos, &hpos, NULL, NULL, in amdgpu_display_flip_work_func() 1441 unsigned int pipe, unsigned int flags, int *vpos, in amdgpu_display_get_crtc_scanoutpos() argument 1467 *vpos = position & 0x1fff; in amdgpu_display_get_crtc_scanoutpos() 1486 *hpos = *vpos - vbl_start; in amdgpu_display_get_crtc_scanoutpos() 1503 if ((*vpos < vbl_start) && (*vpos >= vbl_end)) in amdgpu_display_get_crtc_scanoutpos() 1513 *vpos -= vbl_start; in amdgpu_display_get_crtc_scanoutpos() 1524 if (in_vbl && (*vpos >= vbl_start)) { in amdgpu_display_get_crtc_scanoutpos() 1531 *vpos = (*vpos < vtotal) ? (*vpos - vtotal) : 0; in amdgpu_display_get_crtc_scanoutpos() 1535 *vpos = *vpos - vbl_end; in amdgpu_display_get_crtc_scanoutpos() [all …]
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D | amdgpu_mode.h | 601 unsigned int pipe, unsigned int flags, int *vpos, 630 bool in_vblank_irq, int *vpos,
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D | amdgpu_kms.c | 1334 int vpos, hpos, stat; in amdgpu_get_vblank_counter_kms() local 1362 &vpos, &hpos, NULL, NULL, in amdgpu_get_vblank_counter_kms() 1371 pipe, vpos); in amdgpu_get_vblank_counter_kms() 1377 if (vpos >= 0) in amdgpu_get_vblank_counter_kms()
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/drivers/gpu/drm/radeon/ |
D | radeon_display.c | 287 int vpos, hpos; in radeon_crtc_handle_vblank() local 339 &vpos, &hpos, NULL, NULL, in radeon_crtc_handle_vblank() 341 ((vpos >= 0 && hpos < 0) || (hpos >= 0 && !ASIC_IS_AVIVO(rdev)))) { in radeon_crtc_handle_vblank() 417 int vpos, hpos; in radeon_flip_work_func() local 455 &vpos, &hpos, NULL, NULL, in radeon_flip_work_func() 1811 unsigned int flags, int *vpos, int *hpos, in radeon_get_crtc_scanoutpos() argument 1916 *vpos = position & 0x1fff; in radeon_get_crtc_scanoutpos() 1935 *hpos = *vpos - vbl_start; in radeon_get_crtc_scanoutpos() 1952 if ((*vpos < vbl_start) && (*vpos >= vbl_end)) in radeon_get_crtc_scanoutpos() 1962 *vpos -= vbl_start; in radeon_get_crtc_scanoutpos() [all …]
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D | radeon_kms.c | 780 int vpos, hpos, stat; in radeon_get_vblank_counter_kms() local 809 &vpos, &hpos, NULL, NULL, in radeon_get_vblank_counter_kms() 819 pipe, vpos); in radeon_get_vblank_counter_kms() 825 if (vpos >= 0) in radeon_get_vblank_counter_kms()
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D | radeon_mode.h | 879 unsigned int flags, int *vpos, int *hpos, 885 int *vpos, int *hpos,
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D | radeon_drv.c | 123 unsigned int flags, int *vpos, int *hpos,
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D | radeon_pm.c | 1820 int crtc, vpos, hpos, vbl_status; in radeon_pm_in_vbl() local 1831 &vpos, &hpos, NULL, NULL, in radeon_pm_in_vbl()
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/drivers/gpu/drm/i915/display/ |
D | dvo_ns2501.c | 219 u16 vpos; /* vertical position, 8e/8f */ member 246 .vpos = 16, 266 .vpos = 4, 285 .vpos = 7, 631 ns2501_writeb(dvo, NS2501_REG8E, conf->vpos & 0xff); in ns2501_mode_set() 632 ns2501_writeb(dvo, NS2501_REG8F, conf->vpos >> 8); in ns2501_mode_set()
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D | intel_sdvo.c | 146 struct drm_property *vpos; member 175 unsigned overscan_h, overscan_v, hpos, vpos, sharpness; member 1412 if (intel_sdvo_conn->vpos) in intel_sdvo_update_props() 1413 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS); in intel_sdvo_update_props() 2364 else if (property == intel_sdvo_connector->vpos) in intel_sdvo_connector_atomic_get_property() 2365 *val = sdvo_state->tv.vpos; in intel_sdvo_connector_atomic_get_property() 2422 else if (property == intel_sdvo_connector->vpos) in intel_sdvo_connector_atomic_set_property() 2423 sdvo_state->tv.vpos = val; in intel_sdvo_connector_atomic_set_property() 3172 ENHANCEMENT(&sdvo_state->tv, vpos, VPOS); in intel_sdvo_create_enhance_property_tv()
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D | intel_sdvo_regs.h | 611 unsigned int vpos:1; member
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/drivers/gpu/drm/i2c/ |
D | ch7006_mode.c | 334 int flicker, contrast, hpos, vpos; in ch7006_setup_properties() local 357 vpos = max(0, norm->vdisplay - round_fixed(mode->vdisplay*scale) in ch7006_setup_properties() 360 setbitf(state, CH7006_POV, VPOS_8, vpos); in ch7006_setup_properties() 361 setbitf(state, CH7006_VPOS, 0, vpos); in ch7006_setup_properties() 363 ch7006_dbg(client, "hpos: %d, vpos: %d\n", hpos, vpos); in ch7006_setup_properties()
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/drivers/gpu/drm/vc4/ |
D | vc4_crtc.c | 86 int *vpos, int *hpos, in vc4_crtc_get_scanout_position() argument 119 *vpos = VC4_GET_FIELD(val, SCALER_DISPSTATX_LINE); in vc4_crtc_get_scanout_position() 123 *vpos /= 2; in vc4_crtc_get_scanout_position() 138 if (*vpos > fifo_lines) { in vc4_crtc_get_scanout_position() 151 *vpos -= fifo_lines + 1; in vc4_crtc_get_scanout_position() 177 *vpos = -vblank_lines; in vc4_crtc_get_scanout_position() 200 *vpos = 0; in vc4_crtc_get_scanout_position()
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/drivers/gpu/drm/nouveau/ |
D | nouveau_display.c | 84 nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos, in nouveau_display_scanoutpos_head() argument 113 *vpos = calc(args.scan.vblanks, args.scan.vblanke, in nouveau_display_scanoutpos_head() 123 bool in_vblank_irq, int *vpos, int *hpos, in nouveau_display_scanoutpos() argument 127 return nouveau_display_scanoutpos_head(crtc, vpos, hpos, in nouveau_display_scanoutpos()
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D | nouveau_display.h | 55 bool in_vblank_irq, int *vpos, int *hpos,
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/drivers/gpu/drm/stm/ |
D | ltdc.c | 661 int *vpos, int *hpos, in ltdc_crtc_get_scanout_position() argument 693 *vpos = line - vtotal - vactive_start; in ltdc_crtc_get_scanout_position() 695 *vpos = line - vactive_start; in ltdc_crtc_get_scanout_position() 697 *vpos = 0; in ltdc_crtc_get_scanout_position()
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/drivers/gpu/drm/ |
D | drm_vblank.c | 703 int vpos, hpos, i; in drm_crtc_vblank_helper_get_vblank_timestamp_internal() local 745 &vpos, &hpos, in drm_crtc_vblank_helper_get_vblank_timestamp_internal() 779 delta_ns = div_s64(1000000LL * (vpos * mode->crtc_htotal + hpos), in drm_crtc_vblank_helper_get_vblank_timestamp_internal() 795 pipe, hpos, vpos, in drm_crtc_vblank_helper_get_vblank_timestamp_internal()
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/drivers/gpu/drm/gma500/ |
D | psb_intel_sdvo_regs.h | 600 unsigned int vpos:1; member
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D | psb_intel_sdvo.c | 163 struct drm_property *vpos; member 1682 CHECK_PROPERTY(vpos, VPOS) in psb_intel_sdvo_set_property() 2305 ENHANCEMENT(vpos, VPOS); in psb_intel_sdvo_create_enhance_property_tv()
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/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_hw_sequencer.c | 1823 unsigned int lines_to_vupdate, us_to_vupdate, vpos; in delay_cursor_until_vupdate() local 1836 vpos = position.vertical_count; in delay_cursor_until_vupdate() 1841 vpos += stream->timing.v_total; in delay_cursor_until_vupdate() 1843 if (vpos <= vupdate_start) { in delay_cursor_until_vupdate() 1845 lines_to_vupdate = vupdate_start - vpos; in delay_cursor_until_vupdate() 1846 } else if (vpos > vupdate_end) { in delay_cursor_until_vupdate()
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/drivers/gpu/drm/msm/disp/dpu1/ |
D | dpu_crtc.c | 88 int *vpos, int *hpos, in dpu_crtc_get_scanout_position() argument 129 *vpos = line; in dpu_crtc_get_scanout_position()
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/drivers/gpu/drm/msm/disp/mdp5/ |
D | mdp5_crtc.c | 426 int *vpos, int *hpos, in mdp5_crtc_get_scanout_position() argument 469 *vpos = line; in mdp5_crtc_get_scanout_position()
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/drivers/gpu/drm/i915/ |
D | i915_irq.c | 848 int *vpos, int *hpos, in i915_get_crtc_scanoutpos() argument 969 *vpos = position; in i915_get_crtc_scanoutpos() 972 *vpos = position / htotal; in i915_get_crtc_scanoutpos() 973 *hpos = position - (*vpos * htotal); in i915_get_crtc_scanoutpos()
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/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm.c | 399 uint32_t vpos, hpos, v_blank_start, v_blank_end; in dm_pflip_high_irq() local 434 &v_blank_end, &hpos, &vpos) || in dm_pflip_high_irq() 435 (vpos < v_blank_start)) { in dm_pflip_high_irq() 9053 int planes_count = 0, vpos, hpos; in amdgpu_dm_commit_planes() local 9226 0, &vpos, &hpos, NULL, in amdgpu_dm_commit_planes()
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