Searched refs:vsync_period (Results 1 – 6 of 6) sorted by relevance
/drivers/gpu/drm/msm/disp/mdp4/ |
D | mdp4_dsi_encoder.c | 44 uint32_t dsi_hsync_skew, vsync_period, vsync_len, ctrl_pol; in mdp4_dsi_encoder_mode_set() local 64 vsync_period = mode->vtotal * mode->htotal; in mdp4_dsi_encoder_mode_set() 67 …display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dsi_hsync_s… in mdp4_dsi_encoder_mode_set() 72 mdp4_write(mdp4_kms, REG_MDP4_DSI_VSYNC_PERIOD, vsync_period); in mdp4_dsi_encoder_mode_set()
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D | mdp4_dtv_encoder.c | 45 uint32_t dtv_hsync_skew, vsync_period, vsync_len, ctrl_pol; in mdp4_dtv_encoder_mode_set() local 69 vsync_period = mode->vtotal * mode->htotal; in mdp4_dtv_encoder_mode_set() 72 …display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dtv_hsync_s… in mdp4_dtv_encoder_mode_set() 77 mdp4_write(mdp4_kms, REG_MDP4_DTV_VSYNC_PERIOD, vsync_period); in mdp4_dtv_encoder_mode_set()
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D | mdp4_lcdc_encoder.c | 220 uint32_t lcdc_hsync_skew, vsync_period, vsync_len, ctrl_pol; in mdp4_lcdc_encoder_mode_set() local 244 vsync_period = mode->vtotal * mode->htotal; in mdp4_lcdc_encoder_mode_set() 247 …display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + lcdc_hsync_… in mdp4_lcdc_encoder_mode_set() 252 mdp4_write(mdp4_kms, REG_MDP4_LCDC_VSYNC_PERIOD, vsync_period); in mdp4_lcdc_encoder_mode_set()
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/drivers/gpu/drm/msm/disp/dpu1/ |
D | dpu_hw_intf.c | 86 u32 hsync_period, vsync_period; in dpu_hw_intf_setup_timing_engine() local 100 vsync_period = p->vsync_pulse_width + p->v_back_porch + p->height + in dpu_hw_intf_setup_timing_engine() 105 display_v_end = ((vsync_period - p->v_front_porch) * hsync_period) + in dpu_hw_intf_setup_timing_engine() 188 DPU_REG_WRITE(c, INTF_VSYNC_PERIOD_F0, vsync_period * hsync_period); in dpu_hw_intf_setup_timing_engine()
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/drivers/gpu/drm/msm/disp/mdp5/ |
D | mdp5_encoder.c | 39 uint32_t dtv_hsync_skew, vsync_period, vsync_len, ctrl_pol; in mdp5_vid_encoder_mode_set() local 87 vsync_period = mode->vtotal * mode->htotal; in mdp5_vid_encoder_mode_set() 90 …display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dtv_hsync_s… in mdp5_vid_encoder_mode_set() 107 mdp5_write(mdp5_kms, REG_MDP5_INTF_VSYNC_PERIOD_F0(intf), vsync_period); in mdp5_vid_encoder_mode_set()
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/drivers/gpu/drm/msm/dp/ |
D | dp_catalog.c | 787 u32 hsync_period, vsync_period; in dp_catalog_panel_tpg_enable() local 796 vsync_period = drm_mode->vtotal; in dp_catalog_panel_tpg_enable() 800 display_v_end = ((vsync_period - (drm_mode->vsync_start - in dp_catalog_panel_tpg_enable() 820 dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PERIOD_F0, vsync_period * in dp_catalog_panel_tpg_enable()
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