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Searched refs:writew (Results 1 – 25 of 254) sorted by relevance

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/drivers/i2c/busses/
Di2c-wmt.c143 writew(0, i2c_dev->base + REG_CDR); in wmt_i2c_write()
145 writew(pmsg->buf[0] & 0xFF, i2c_dev->base + REG_CDR); in wmt_i2c_write()
151 writew(val, i2c_dev->base + REG_CR); in wmt_i2c_write()
155 writew(val, i2c_dev->base + REG_CR); in wmt_i2c_write()
167 writew(tcr_val, i2c_dev->base + REG_TCR); in wmt_i2c_write()
172 writew(val, i2c_dev->base + REG_CR); in wmt_i2c_write()
196 writew(val, i2c_dev->base + REG_CR); in wmt_i2c_write()
202 writew(CR_ENABLE, i2c_dev->base + REG_CR); in wmt_i2c_write()
204 writew(pmsg->buf[xfer_len] & 0xFF, i2c_dev->base + in wmt_i2c_write()
206 writew(CR_CPU_RDY | CR_ENABLE, i2c_dev->base + REG_CR); in wmt_i2c_write()
[all …]
/drivers/net/ethernet/stmicro/stmmac/
Daltr_tse_pcs.c69 writew(val, base + TSE_PCS_CONTROL_REG); in tse_pcs_reset()
91 writew(TSE_PCS_IF_USE_SGMII, base + TSE_PCS_IF_MODE_REG); in tse_pcs_init()
93 writew(TSE_PCS_CTRL_AUTONEG_SGMII, base + TSE_PCS_CONTROL_REG); in tse_pcs_init()
95 writew(TSE_PCS_SGMII_LINK_TIMER_0, base + TSE_PCS_LINK_TIMER_0_REG); in tse_pcs_init()
96 writew(TSE_PCS_SGMII_LINK_TIMER_1, base + TSE_PCS_LINK_TIMER_1_REG); in tse_pcs_init()
100 writew(SGMII_ADAPTER_ENABLE, in tse_pcs_init()
117 writew(SGMII_ADAPTER_ENABLE, in pcs_link_timer_callback()
174 writew(SGMII_ADAPTER_ENABLE, in auto_nego_timer_callback()
179 writew(val, tse_pcs_base + TSE_PCS_CONTROL_REG); in auto_nego_timer_callback()
208 writew(val, tse_pcs_base + TSE_PCS_CONTROL_REG); in tse_pcs_fix_mac_speed()
[all …]
/drivers/comedi/drivers/
Ddt3000.c232 writew(cmd, dev->mmio + DPR_CMD_MBX); in dt3k_send_cmd()
251 writew(subsys, dev->mmio + DPR_SUBSYS); in dt3k_readsingle()
253 writew(chan, dev->mmio + DPR_PARAMS(0)); in dt3k_readsingle()
254 writew(gain, dev->mmio + DPR_PARAMS(1)); in dt3k_readsingle()
264 writew(subsys, dev->mmio + DPR_SUBSYS); in dt3k_writesingle()
266 writew(chan, dev->mmio + DPR_PARAMS(0)); in dt3k_writesingle()
267 writew(0, dev->mmio + DPR_PARAMS(1)); in dt3k_writesingle()
268 writew(data, dev->mmio + DPR_PARAMS(2)); in dt3k_writesingle()
299 writew(rear, dev->mmio + DPR_AD_BUF_REAR); in dt3k_ai_empty_fifo()
305 writew(DPR_SUBSYS_AI, dev->mmio + DPR_SUBSYS); in dt3k_ai_cancel()
[all …]
Dicp_multi.c121 writew(adc_csr, dev->mmio + ICP_MULTI_ADC_CSR); in icp_multi_ai_insn_read()
125 writew(adc_csr | ICP_MULTI_ADC_CSR_ST, in icp_multi_ai_insn_read()
167 writew(dac_csr, dev->mmio + ICP_MULTI_DAC_CSR); in icp_multi_ao_insn_write()
178 writew(val, dev->mmio + ICP_MULTI_AO); in icp_multi_ao_insn_write()
181 writew(dac_csr | ICP_MULTI_DAC_CSR_ST, in icp_multi_ao_insn_write()
206 writew(s->state, dev->mmio + ICP_MULTI_DO); in icp_multi_do_insn_bits()
218 writew(0, dev->mmio + ICP_MULTI_INT_EN); in icp_multi_reset()
219 writew(ICP_MULTI_INT_MASK, dev->mmio + ICP_MULTI_INT_STAT); in icp_multi_reset()
226 writew(dac_csr, dev->mmio + ICP_MULTI_DAC_CSR); in icp_multi_reset()
229 writew(0, dev->mmio + ICP_MULTI_AO); in icp_multi_reset()
[all …]
Dme_daq.c177 writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG); in me_dio_insn_config()
195 writew((s->state & 0xffff), mmio_porta); in me_dio_insn_bits()
197 writew(((s->state >> 16) & 0xffff), mmio_portb); in me_dio_insn_bits()
252 writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG); in me_ai_insn_read()
254 writew(0x00, dev->mmio + ME_STATUS_REG); /* clear interrupts */ in me_ai_insn_read()
258 writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG); in me_ai_insn_read()
266 writew(val, dev->mmio + ME_AI_FIFO_REG); in me_ai_insn_read()
270 writew(devpriv->ctrl1, dev->mmio + ME_CTRL1_REG); in me_ai_insn_read()
290 writew(devpriv->ctrl1, dev->mmio + ME_CTRL1_REG); in me_ai_insn_read()
308 writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG); in me_ao_insn_write()
[all …]
Ddaqboard2000.c262 writew(entry & 0x00ff, dev->mmio + DB2K_REG_ACQ_SCAN_LIST_FIFO); in db2k_write_acq_scan_list_entry()
263 writew((entry >> 8) & 0x00ff, in db2k_write_acq_scan_list_entry()
326 writew(DB2K_ACQ_CONTROL_RESET_SCAN_LIST_FIFO | in db2k_ai_insn_read()
337 writew(0, dev->mmio + DB2K_REG_ACQ_PACER_CLOCK_DIV_HIGH); in db2k_ai_insn_read()
351 writew(DB2K_ACQ_CONTROL_SEQ_START_SCAN_LIST, in db2k_ai_insn_read()
359 writew(DB2K_ACQ_CONTROL_ADC_PACER_ENABLE, in db2k_ai_insn_read()
374 writew(DB2K_ACQ_CONTROL_ADC_PACER_DISABLE, in db2k_ai_insn_read()
376 writew(DB2K_ACQ_CONTROL_SEQ_STOP_SCAN_LIST, in db2k_ai_insn_read()
406 writew(val, dev->mmio + DB2K_REG_DAC_SETTING(chan)); in db2k_ao_insn_write()
507 writew(data, dev->mmio + DB2K_REG_CPLD_WDATA); in db2k_write_cpld()
[all …]
Dcb_pcidas64.c1245 writew(devpriv->intr_enable_bits, in disable_ai_interrupts()
1271 writew(devpriv->intr_enable_bits, in enable_ai_interrupts()
1350 writew(devpriv->adc_control1_bits, in disable_ai_pacing()
1355 writew(ADC_DMA_DISABLE_BIT | ADC_SOFT_GATE_BITS | ADC_GATE_LEVEL_BIT, in disable_ai_pacing()
1380 writew(devpriv->fifo_size_bits, in set_ai_fifo_segment_length()
1435 writew(devpriv->adc_control1_bits, in init_stc_registers()
1439 writew(0xff, devpriv->main_iobase + ADC_SAMPLE_INTERVAL_UPPER_REG); in init_stc_registers()
1445 writew(devpriv->hw_config_bits, in init_stc_registers()
1448 writew(0, devpriv->main_iobase + DAQ_SYNC_REG); in init_stc_registers()
1449 writew(0, devpriv->main_iobase + CALIBRATION_REG); in init_stc_registers()
[all …]
/drivers/scsi/arm/
Dcumana_1.c64 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
65 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
66 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
67 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
68 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
69 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
70 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
71 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
/drivers/watchdog/
Drza_wdt.c79 writew(WTCSR_MAGIC | 0, priv->base + WTCSR); in rza_wdt_start()
83 writew(WRCSR_CLEAR_WOVF, priv->base + WRCSR); in rza_wdt_start()
87 writew(WRCSR_MAGIC | WRCSR_RSTE, priv->base + WRCSR); in rza_wdt_start()
88 writew(WTCNT_MAGIC | priv->count, priv->base + WTCNT); in rza_wdt_start()
89 writew(WTCSR_MAGIC | WTSCR_WT | WTSCR_TME | in rza_wdt_start()
99 writew(WTCSR_MAGIC | 0, priv->base + WTCSR); in rza_wdt_stop()
108 writew(WTCNT_MAGIC | priv->count, priv->base + WTCNT); in rza_wdt_ping()
128 writew(WTCSR_MAGIC | 0, priv->base + WTCSR); in rza_wdt_restart()
132 writew(WRCSR_CLEAR_WOVF, priv->base + WRCSR); in rza_wdt_restart()
138 writew(WRCSR_MAGIC | WRCSR_RSTE, priv->base + WRCSR); in rza_wdt_restart()
[all …]
Dmsc313e_wdt.c46 writew(timeout & 0xffff, priv->base + REG_WDT_MAX_PRD_L); in msc313e_wdt_start()
47 writew((timeout >> 16) & 0xffff, priv->base + REG_WDT_MAX_PRD_H); in msc313e_wdt_start()
48 writew(1, priv->base + REG_WDT_CLR); in msc313e_wdt_start()
56 writew(1, priv->base + REG_WDT_CLR); in msc313e_wdt_ping()
64 writew(0, priv->base + REG_WDT_MAX_PRD_L); in msc313e_wdt_stop()
65 writew(0, priv->base + REG_WDT_MAX_PRD_H); in msc313e_wdt_stop()
66 writew(0, priv->base + REG_WDT_CLR); in msc313e_wdt_stop()
Dsc520_wdt.c141 writew(0xAAAA, wdtmrctl); in wdt_timer_ping()
142 writew(0x5555, wdtmrctl); in wdt_timer_ping()
162 writew(0xAAAA, wdtmrctl); in wdt_config()
163 writew(0x5555, wdtmrctl); in wdt_config()
165 writew(0x3333, wdtmrctl); in wdt_config()
166 writew(0xCCCC, wdtmrctl); in wdt_config()
168 writew(writeval, wdtmrctl); in wdt_config()
/drivers/tty/
Dmoxa.c249 writew(arg, ofsAddr + FuncArg); in moxafunc()
250 writew(cmd, ofsAddr + FuncCode); in moxafunc()
260 writew(arg, ofsAddr + FuncArg); in moxafuncret()
261 writew(cmd, ofsAddr + FuncCode); in moxafuncret()
512 writew(len - 7168 - 2, baseAddr + C320bapi_len); in moxa_load_320b()
568 writew(len2, baseAddr + loadlen); in moxa_real_load_code()
569 writew(0, baseAddr + key); in moxa_real_load_code()
578 writew(0, baseAddr + loadlen); in moxa_real_load_code()
579 writew(usum, baseAddr + checksum); in moxa_real_load_code()
580 writew(0, baseAddr + key); in moxa_real_load_code()
[all …]
Dnozomi.c449 writew(__cpu_to_le16(*buf16), ptr); in write_mem32()
465 writew(__cpu_to_le16(*buf16), ptr); in write_mem32()
645 writew(dc->last_ier, dc->reg_ier); in nozomi_read_config_table()
674 writew(MDM_UL | DIAG_DL | MDM_DL, dc->reg_fcr); in nozomi_read_config_table()
689 writew(dc->last_ier, dc->reg_ier); in enable_transmit_ul()
703 writew(dc->last_ier, dc->reg_ier); in disable_transmit_ul()
716 writew(dc->last_ier, dc->reg_ier); in enable_transmit_dl()
730 writew(dc->last_ier, dc->reg_ier); in disable_transmit_dl()
1020 writew(mask1, dc->reg_fcr); in handle_data_dl()
1026 writew(mask2, dc->reg_fcr); in handle_data_dl()
[all …]
/drivers/pwm/
Dpwm-ep93xx.c75 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE); in ep93xx_pwm_apply()
89 writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_INVERT); in ep93xx_pwm_apply()
91 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_INVERT); in ep93xx_pwm_apply()
98 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE); in ep93xx_pwm_apply()
130 writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT); in ep93xx_pwm_apply()
131 writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE); in ep93xx_pwm_apply()
133 writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE); in ep93xx_pwm_apply()
134 writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT); in ep93xx_pwm_apply()
152 writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_ENABLE); in ep93xx_pwm_apply()
/drivers/input/keyboard/
Dimx_keypad.c95 writew(reg_val, keypad->mmio_base + KPDR); in imx_keypad_scan_matrix()
99 writew(reg_val, keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
105 writew(reg_val, keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
114 writew(reg_val, keypad->mmio_base + KPDR); in imx_keypad_scan_matrix()
136 writew(reg_val, keypad->mmio_base + KPDR); in imx_keypad_scan_matrix()
260 writew(reg_val, keypad->mmio_base + KPSR); in imx_keypad_check_for_events()
265 writew(reg_val, keypad->mmio_base + KPSR); in imx_keypad_check_for_events()
278 writew(reg_val, keypad->mmio_base + KPSR); in imx_keypad_check_for_events()
283 writew(reg_val, keypad->mmio_base + KPSR); in imx_keypad_check_for_events()
298 writew(reg_val, keypad->mmio_base + KPSR); in imx_keypad_irq_handler()
[all …]
/drivers/media/pci/netup_unidvb/
Dnetup_unidvb_i2c.c73 writew(reg & ~TWI_IRQEN, &i2c->regs->twi_ctrl0_stat); in netup_i2c_interrupt()
96 writew(tmp & ~FIFO_IRQEN, &i2c->regs->rx_fifo.stat_ctrl); in netup_i2c_interrupt()
104 writew(tmp & ~FIFO_IRQEN, &i2c->regs->tx_fifo.stat_ctrl); in netup_i2c_interrupt()
123 writew(TWI_SOFT_RESET, &i2c->regs->twi_addr_ctrl1); in netup_i2c_reset()
124 writew(TWI_CLKDIV, &i2c->regs->clkdiv); in netup_i2c_reset()
125 writew(FIFO_RESET, &i2c->regs->tx_fifo.stat_ctrl); in netup_i2c_reset()
126 writew(FIFO_RESET, &i2c->regs->rx_fifo.stat_ctrl); in netup_i2c_reset()
127 writew(0x800, &i2c->regs->tx_fifo.stat_ctrl); in netup_i2c_reset()
128 writew(0x800, &i2c->regs->rx_fifo.stat_ctrl); in netup_i2c_reset()
148 writew(readw(&i2c->regs->tx_fifo.stat_ctrl) | FIFO_IRQEN, in netup_i2c_fifo_tx()
[all …]
Dnetup_unidvb_spi.c85 writew(reg | NETUP_SPI_CTRL_IRQ, &spi->regs->control_stat); in netup_spi_interrupt()
87 writew(reg & ~NETUP_SPI_CTRL_IMASK, &spi->regs->control_stat); in netup_spi_interrupt()
105 writew(NETUP_SPI_CTRL_LAST_CS, &spi->regs->control_stat); in netup_spi_transfer()
106 writew(0, &spi->regs->control_stat); in netup_spi_transfer()
129 writew((frag_size & 0x3ff) | in netup_spi_transfer()
195 writew(2, &nspi->regs->clock_divider); in netup_spi_init()
196 writew(NETUP_UNIDVB_IRQ_SPI, ndev->bmmio0 + REG_IMASK_SET); in netup_spi_init()
233 writew(reg | NETUP_SPI_CTRL_IRQ, &spi->regs->control_stat); in netup_spi_release()
235 writew(reg & ~NETUP_SPI_CTRL_IMASK, &spi->regs->control_stat); in netup_spi_release()
/drivers/gpu/drm/nouveau/dispnv50/
Dheadc57d.c138 writew(r + ri * i, mem + 0); in headc57d_olut_load_8()
139 writew(g + gi * i, mem + 2); in headc57d_olut_load_8()
140 writew(b + bi * i, mem + 4); in headc57d_olut_load_8()
147 writew(readw(mem - 8), mem + 0); in headc57d_olut_load_8()
148 writew(readw(mem - 6), mem + 2); in headc57d_olut_load_8()
149 writew(readw(mem - 4), mem + 4); in headc57d_olut_load_8()
159 writew(drm_color_lut_extract(in-> red, 16), mem + 0); in headc57d_olut_load()
160 writew(drm_color_lut_extract(in->green, 16), mem + 2); in headc57d_olut_load()
161 writew(drm_color_lut_extract(in-> blue, 16), mem + 4); in headc57d_olut_load()
167 writew(readw(mem - 8), mem + 0); in headc57d_olut_load()
[all …]
/drivers/tty/serial/
Dmilbeaut_usio.c67 writew(readw(port->membase + MLB_USIO_REG_FCR) & ~MLB_USIO_FCR_FTIE, in mlb_usio_stop_tx()
78 writew(readw(port->membase + MLB_USIO_REG_FCR) & ~MLB_USIO_FCR_FTIE, in mlb_usio_tx_chars()
85 writew(port->x_char, port->membase + MLB_USIO_REG_DR); in mlb_usio_tx_chars()
99 writew(xmit->buf[xmit->tail], port->membase + MLB_USIO_REG_DR); in mlb_usio_tx_chars()
108 writew(readw(port->membase + MLB_USIO_REG_FCR) & ~MLB_USIO_FCR_FDRQ, in mlb_usio_tx_chars()
125 writew(fcr | MLB_USIO_FCR_FTIE, port->membase + MLB_USIO_REG_FCR); in mlb_usio_start_tx()
200 writew(readw(port->membase + MLB_USIO_REG_FCR) | in mlb_usio_rx_chars()
277 writew(0, port->membase + MLB_USIO_REG_FCR); in mlb_usio_startup()
278 writew(MLB_USIO_FCR_FCL1 | MLB_USIO_FCR_FCL2, in mlb_usio_startup()
280 writew(MLB_USIO_FCR_FE1 | MLB_USIO_FCR_FE2 | MLB_USIO_FCR_FRIIE, in mlb_usio_startup()
[all …]
/drivers/net/ethernet/packetengines/
Dhamachi.c773 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */ in hamachi_init_one()
774 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */ in hamachi_init_one()
775 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */ in hamachi_init_one()
802 writew(location, ioaddr + EEAddr); in read_eeprom()
826 writew((phy_id<<8) + location, ioaddr + MII_Addr); in mdio_read()
827 writew(0x0001, ioaddr + MII_Cmd); in mdio_read()
844 writew((phy_id<<8) + location, ioaddr + MII_Addr); in mdio_write()
845 writew(value, ioaddr + MII_Wr_Data); in mdio_write()
894 writew(0x0000, ioaddr + FIFOcfg); in hamachi_open()
898 writew(0x0028, ioaddr + FIFOcfg); in hamachi_open()
[all …]
/drivers/spi/
Dspi-omap-100k.c88 writew(val, spi100k->base + SPI_SETUP1); in spi100k_enable_clock()
99 writew(val, spi100k->base + SPI_SETUP1); in spi100k_disable_clock()
113 writew(data, spi100k->base + SPI_TX_MSB); in spi100k_write_data()
115 writew(SPI_CTRL_SEN(0) | in spi100k_write_data()
138 writew(SPI_CTRL_SEN(0) | in spi100k_read_data()
159 writew(SPI_SETUP1_INT_READ_ENABLE | in spi100k_open()
164 writew(SPI_SETUP2_ACTIVE_EDGE_FALLING | in spi100k_open()
172 writew(0x05fc, spi100k->base + SPI_CTRL); in omap1_spi100k_force_cs()
174 writew(0x05fd, spi100k->base + SPI_CTRL); in omap1_spi100k_force_cs()
249 writew(0x3e, spi100k->base + SPI_SETUP1); in omap1_spi100k_setup_transfer()
[all …]
/drivers/pci/controller/
Dpci-v3-semi.c378 writew(mapaddress, v3->base + V3_LB_MAP1); in v3_map_bus()
392 writew(v3_addr_to_lb_map(v3->pre_bus_addr) | in v3_unmap_bus()
453 writew(status, v3->base + V3_PCI_STAT); in v3_irq()
535 writew(v3_addr_to_lb_map2(io->start - win->offset), in v3_pci_setup_resource()
562 writew(v3_addr_to_lb_map(v3->pre_bus_addr) | in v3_pci_setup_resource()
581 writew(v3_addr_to_lb_map(v3->non_pre_bus_addr) | in v3_pci_setup_resource()
782 writew(V3_SYSTEM_UNLOCK, v3->base + V3_SYSTEM); in v3_pci_probe()
787 writew(val, v3->base + V3_PCI_CMD); in v3_pci_probe()
792 writew(val, v3->base + V3_SYSTEM); in v3_pci_probe()
797 writew(val, v3->base + V3_PCI_CFG); in v3_pci_probe()
[all …]
/drivers/atm/
Diphase.c275 writew(0xFFFD, dev->seg_reg+MODE_REG_0); in clear_lockup()
286 writew(T_ONLINE, dev->seg_reg+MODE_REG_0); in clear_lockup()
287 writew(~(TRANSMIT_DONE|TCQ_NOT_EMPTY), dev->seg_reg+SEG_MASK_REG); in clear_lockup()
288 writew(TRANSMIT_DONE, dev->seg_reg+SEG_INTR_STATUS_REG); in clear_lockup()
572 writew((CBR_EN | UBR_EN | ABR_EN | (0x23 << 2)), dev->seg_reg+STPARMS); in ia_cbr_setup()
586 writew((UBR_EN | ABR_EN | (0x23 << 2)), iadev->seg_reg+STPARMS); in ia_cbrVc_close()
1079 writew( excpq_rd_ptr, iadev->reass_reg + EXCP_Q_RD_PTR);
1089 writew(desc, iadev->reass_ram+iadev->rfL.fdq_wr);
1093 writew(iadev->rfL.fdq_wr, iadev->reass_reg+FREEQ_WR_PTR);
1126 writew(iadev->rfL.pcq_rd, iadev->reass_reg+PCQ_RD_PTR);
[all …]
/drivers/mtd/nand/raw/
Dmxc_nand.c365 writew(tmp & ~NFC_V1_V2_CONFIG2_INT, NFC_V1_V2_CONFIG2); in check_int_v1_v2()
381 writew(tmp, NFC_V1_V2_CONFIG1); in irq_control_v1_v2()
507 writew(cmd, NFC_V1_V2_FLASH_CMD); in send_cmd_v1_v2()
508 writew(NFC_CMD, NFC_V1_V2_CONFIG2); in send_cmd_v1_v2()
546 writew(addr, NFC_V1_V2_FLASH_ADDR); in send_addr_v1_v2()
547 writew(NFC_ADDR, NFC_V1_V2_CONFIG2); in send_addr_v1_v2()
575 writew(host->active_cs << 4, NFC_V1_V2_BUF_ADDR); in send_page_v2()
577 writew(ops, NFC_V1_V2_CONFIG2); in send_page_v2()
597 writew((host->active_cs << 4) | i, NFC_V1_V2_BUF_ADDR); in send_page_v1()
599 writew(ops, NFC_V1_V2_CONFIG2); in send_page_v1()
[all …]
/drivers/ata/
Dsata_vsc.c158 writew(tf->feature | (((u16)tf->hob_feature) << 8), in vsc_sata_tf_load()
160 writew(tf->nsect | (((u16)tf->hob_nsect) << 8), in vsc_sata_tf_load()
162 writew(tf->lbal | (((u16)tf->hob_lbal) << 8), in vsc_sata_tf_load()
164 writew(tf->lbam | (((u16)tf->hob_lbam) << 8), in vsc_sata_tf_load()
166 writew(tf->lbah | (((u16)tf->hob_lbah) << 8), in vsc_sata_tf_load()
169 writew(tf->feature, ioaddr->feature_addr); in vsc_sata_tf_load()
170 writew(tf->nsect, ioaddr->nsect_addr); in vsc_sata_tf_load()
171 writew(tf->lbal, ioaddr->lbal_addr); in vsc_sata_tf_load()
172 writew(tf->lbam, ioaddr->lbam_addr); in vsc_sata_tf_load()
173 writew(tf->lbah, ioaddr->lbah_addr); in vsc_sata_tf_load()

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