Searched refs:zbc (Results 1 – 25 of 32) sorted by relevance
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| /drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| D | gp102.c | 30 gp102_gr_zbc_clear_stencil(struct gf100_gr *gr, int zbc) in gp102_gr_zbc_clear_stencil() argument
33 const int znum = zbc - 1; in gp102_gr_zbc_clear_stencil()
36 if (gr->zbc_stencil[zbc].format) in gp102_gr_zbc_clear_stencil()
37 nvkm_wr32(device, 0x41815c + zoff, gr->zbc_stencil[zbc].ds); in gp102_gr_zbc_clear_stencil()
40 gr->zbc_stencil[zbc].format << ((znum % 4) * 7)); in gp102_gr_zbc_clear_stencil()
48 int zbc = -ENOSPC, i; in gp102_gr_zbc_stencil_get() local
62 zbc = (zbc < 0) ? i : zbc; in gp102_gr_zbc_stencil_get()
66 if (zbc < 0) in gp102_gr_zbc_stencil_get()
67 return zbc; in gp102_gr_zbc_stencil_get()
69 gr->zbc_stencil[zbc].format = format; in gp102_gr_zbc_stencil_get()
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| D | gp100.c | 33 gp100_gr_zbc_clear_color(struct gf100_gr *gr, int zbc) in gp100_gr_zbc_clear_color() argument
36 const int znum = zbc - 1; in gp100_gr_zbc_clear_color()
39 if (gr->zbc_color[zbc].format) { in gp100_gr_zbc_clear_color()
40 nvkm_wr32(device, 0x418010 + zoff, gr->zbc_color[zbc].ds[0]); in gp100_gr_zbc_clear_color()
41 nvkm_wr32(device, 0x41804c + zoff, gr->zbc_color[zbc].ds[1]); in gp100_gr_zbc_clear_color()
42 nvkm_wr32(device, 0x418088 + zoff, gr->zbc_color[zbc].ds[2]); in gp100_gr_zbc_clear_color()
43 nvkm_wr32(device, 0x4180c4 + zoff, gr->zbc_color[zbc].ds[3]); in gp100_gr_zbc_clear_color()
48 gr->zbc_color[zbc].format << ((znum % 4) * 7)); in gp100_gr_zbc_clear_color()
52 gp100_gr_zbc_clear_depth(struct gf100_gr *gr, int zbc) in gp100_gr_zbc_clear_depth() argument
55 const int znum = zbc - 1; in gp100_gr_zbc_clear_depth()
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| D | gf100.c | 49 gf100_gr_zbc_clear_color(struct gf100_gr *gr, int zbc) in gf100_gr_zbc_clear_color() argument
52 if (gr->zbc_color[zbc].format) { in gf100_gr_zbc_clear_color()
53 nvkm_wr32(device, 0x405804, gr->zbc_color[zbc].ds[0]); in gf100_gr_zbc_clear_color()
54 nvkm_wr32(device, 0x405808, gr->zbc_color[zbc].ds[1]); in gf100_gr_zbc_clear_color()
55 nvkm_wr32(device, 0x40580c, gr->zbc_color[zbc].ds[2]); in gf100_gr_zbc_clear_color()
56 nvkm_wr32(device, 0x405810, gr->zbc_color[zbc].ds[3]); in gf100_gr_zbc_clear_color()
58 nvkm_wr32(device, 0x405814, gr->zbc_color[zbc].format); in gf100_gr_zbc_clear_color()
59 nvkm_wr32(device, 0x405820, zbc); in gf100_gr_zbc_clear_color()
68 int zbc = -ENOSPC, i; in gf100_gr_zbc_color_get() local
84 zbc = (zbc < 0) ? i : zbc; in gf100_gr_zbc_color_get()
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| D | gf100.h | 144 void (*clear_color)(struct gf100_gr *, int zbc);
145 void (*clear_depth)(struct gf100_gr *, int zbc);
148 void (*clear_stencil)(struct gf100_gr *, int zbc);
194 const struct gf100_gr_func_zbc *zbc; member
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| D | gp107.c | 54 .zbc = &gp102_gr_zbc,
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| D | gp104.c | 52 .zbc = &gp102_gr_zbc,
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| D | gp10b.c | 64 .zbc = &gp100_gr_zbc,
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| D | gf104.c | 137 .zbc = &gf100_gr_zbc,
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| D | gf110.c | 109 .zbc = &gf100_gr_zbc,
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| D | gk110b.c | 129 .zbc = &gf100_gr_zbc,
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| D | gf119.c | 200 .zbc = &gf100_gr_zbc,
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| D | gf108.c | 135 .zbc = &gf100_gr_zbc,
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| D | gk208.c | 187 .zbc = &gf100_gr_zbc,
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| D | gf117.c | 174 .zbc = &gf100_gr_zbc,
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| D | gv100.c | 113 .zbc = &gp102_gr_zbc,
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| D | gk110.c | 378 .zbc = &gf100_gr_zbc,
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| D | tu102.c | 118 .zbc = &gp102_gr_zbc,
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| /drivers/gpu/drm/nouveau/nvkm/subdev/ltc/ |
| D | gp102.c | 39 .zbc = 16,
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| D | gk104.c | 45 .zbc = 16,
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| D | gm200.c | 52 .zbc = 16,
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| D | gp10b.c | 53 .zbc = 16,
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| D | gp100.c | 64 .zbc = 16,
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| D | priv.h | 19 int zbc; member
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| D | base.c | 141 ltc->zbc_max = min(func->zbc, NVKM_LTC_MAX_ZBC_CNT) - 1; in nvkm_ltc_new_()
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| D | gm107.c | 140 .zbc = 16,
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