Searched refs:CG_UPLL_FUNC_CNTL_3 (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/radeon/ |
| D | rv770.c | 84 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(0x50000), ~UPLL_FB_DIV_MASK); in rv770_set_uvd_clocks()
91 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(1), ~UPLL_FB_DIV(1)); in rv770_set_uvd_clocks()
109 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), in rv770_set_uvd_clocks()
122 WREG32_P(CG_UPLL_FUNC_CNTL_3, 0, ~UPLL_FB_DIV(1)); in rv770_set_uvd_clocks()
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| D | rv770d.h | 61 #define CG_UPLL_FUNC_CNTL_3 0x720 macro
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| D | sid.h | 145 #define CG_UPLL_FUNC_CNTL_3 0x63C macro
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| D | evergreend.h | 366 #define CG_UPLL_FUNC_CNTL_3 0x720 macro
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| D | evergreen.c | 1236 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), ~UPLL_FB_DIV_MASK); in evergreen_set_uvd_clocks()
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| D | si.c | 7043 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), ~UPLL_FB_DIV_MASK); in si_set_uvd_clocks()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | sid.h | 146 #define CG_UPLL_FUNC_CNTL_3 0x18f macro
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| D | si.c | 1824 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), ~UPLL_FB_DIV_MASK); in si_set_uvd_clocks()
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