Searched refs:DWB_OGAM_RAMA_END_CNTL2_G (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_dwb.h | 95 SR(DWB_OGAM_RAMA_END_CNTL2_G),\
254 SF_DWB2(DWB_OGAM_RAMA_END_CNTL2_G, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_END_G, mask_sh),\
255 SF_DWB2(DWB_OGAM_RAMA_END_CNTL2_G, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_END_SLOPE_G, mask_sh),\
800 uint32_t DWB_OGAM_RAMA_END_CNTL2_G; member
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| D | dcn30_dwb_cm.c | 101 gam_regs.start_end_cntl2_g = REG(DWB_OGAM_RAMA_END_CNTL2_G); in dwb3_program_ogam_luta_settings()
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