Searched refs:REG_MAC_PHY_CTRL (Results 1 – 15 of 15) sorted by relevance
| /drivers/staging/rtl8723bs/hal/ |
| D | odm_CfoTracking.c | 24 REG_MAC_PHY_CTRL, in odm_SetCrystalCap()
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| D | rtl8723b_phycfg.c | 415 PHY_SetBBReg(Adapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); in PHY_BBConfig8723B()
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| /drivers/net/wireless/realtek/rtlwifi/rtl8821ae/ |
| D | dm.c | 2637 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, in rtl8821ae_dm_dynamic_atc_switch()
2641 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, in rtl8821ae_dm_dynamic_atc_switch()
2730 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, in rtl8821ae_dm_dynamic_atc_switch()
2734 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, in rtl8821ae_dm_dynamic_atc_switch()
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| D | reg.h | 30 #define REG_MAC_PHY_CTRL 0x002c macro
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| D | phy.c | 315 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, 0x7FF80000, in rtl8821ae_phy_bb_config()
319 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, 0xFFF000, in rtl8821ae_phy_bb_config()
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| /drivers/net/wireless/realtek/rtlwifi/rtl8192ee/ |
| D | dm.c | 699 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, 0xFFF000, in rtl92ee_dm_dynamic_atc_switch()
755 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, 0xFFF000, in rtl92ee_dm_dynamic_atc_switch()
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| D | reg.h | 27 #define REG_MAC_PHY_CTRL 0x002c macro
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| D | phy.c | 234 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, 0xFFF000, in rtl92ee_phy_bb_config()
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| /drivers/net/wireless/realtek/rtlwifi/rtl8723be/ |
| D | dm.c | 1133 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, 0xFFF000, in rtl8723be_dm_dynamic_atc_switch()
1189 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, 0xFFF000, in rtl8723be_dm_dynamic_atc_switch()
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| D | reg.h | 30 #define REG_MAC_PHY_CTRL 0x002c macro
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| D | phy.c | 121 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, 0xFFF000, in rtl8723be_phy_bb_config()
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| /drivers/net/wireless/realtek/rtlwifi/rtl8192de/ |
| D | reg.h | 29 #define REG_MAC_PHY_CTRL 0x002c macro
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| /drivers/net/wireless/realtek/rtl8xxxu/ |
| D | rtl8xxxu_regs.h | 115 #define REG_MAC_PHY_CTRL 0x002c macro
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| D | rtl8xxxu_core.c | 2321 val32 = rtl8xxxu_read32(priv, REG_MAC_PHY_CTRL); in rtl8xxxu_init_phy_bb()
2327 rtl8xxxu_write32(priv, REG_MAC_PHY_CTRL, val32); in rtl8xxxu_init_phy_bb()
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| /drivers/staging/rtl8723bs/include/ |
| D | hal_com_reg.h | 50 #define REG_MAC_PHY_CTRL 0x002c /* for 92d, DMDP, SMSP, DMSP contrl */ macro
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