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Searched refs:VIA_PCI_DMA_MR0 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/via/
Dvia_dmablit.h107 #define VIA_PCI_DMA_MR0 0xE80 /* Mode Register of Channel 0 */ macro
Dvia_dmablit.c218 via_write(dev_priv, VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE); in via_fire_dmablit()