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Searched refs:control_offset (Results 1 – 4 of 4) sorted by relevance

/drivers/mfd/
Dtwl4030-irq.c58 u8 control_offset; /* for SIH_CTRL */ member
82 .control_offset = TWL4030_ ## modname ## _SIH_CTRL, \
112 .control_offset = REG_GPIO_SIH_CTRL,
136 .control_offset = TWL4030_INTERRUPTS_BCISIHCTRL,
172 .control_offset = REG_GPIO_SIH_CTRL,
196 .control_offset = TWL5031_INTERRUPTS_BCISIHCTRL,
245 .control_offset = TWL5031_ACCSIHCTRL,
356 sih->control_offset); in twl4030_init_sih_modules()
/drivers/input/rmi4/
Drmi_f12.c244 u16 control_offset = 0; in rmi_f12_write_control_regs() local
251 control_offset = rmi_register_desc_calc_reg_offset( in rmi_f12_write_control_regs()
263 + control_offset, buf, control_size); in rmi_f12_write_control_regs()
283 fn->fd.control_base_addr + control_offset, in rmi_f12_write_control_regs()
/drivers/staging/greybus/
Daudio_codec.h153 unsigned long control_offset; member
Daudio_topology.c1342 module->control_offset = module->dai_offset + in gbaudio_tplg_process_header()
1344 module->widget_offset = module->control_offset + in gbaudio_tplg_process_header()
1351 module->control_offset); in gbaudio_tplg_process_header()
1378 controls = (struct gb_audio_control *)module->control_offset; in gbaudio_tplg_parse_data()