| /drivers/infiniband/hw/hfi1/ |
| D | exp_rcv.c | 42 ngroups = rcd->expected_count / dd->rcv_entries.group_size; in hfi1_alloc_ctxt_rcv_groups()
51 grp->size = dd->rcv_entries.group_size; in hfi1_alloc_ctxt_rcv_groups()
54 tidbase += dd->rcv_entries.group_size; in hfi1_alloc_ctxt_rcv_groups()
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| D | init.c | 374 rcd->eager_base = base * dd->rcv_entries.group_size; in hfi1_create_ctxtdata()
392 dd->rcv_entries.group_size; in hfi1_create_ctxtdata()
395 dd->rcv_entries.group_size); in hfi1_create_ctxtdata()
1843 if (rcd->egrbufs.size < (round_mtu * dd->rcv_entries.group_size)) in hfi1_setup_eagerbufs()
1844 rcd->egrbufs.size = round_mtu * dd->rcv_entries.group_size; in hfi1_setup_eagerbufs()
1953 max_entries = rcd->rcv_array_groups * dd->rcv_entries.group_size; in hfi1_setup_eagerbufs()
1954 egrtop = roundup(rcd->egrbufs.alloced, dd->rcv_entries.group_size); in hfi1_setup_eagerbufs()
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| D | user_exp_rcv.c | 312 ngroups = pageset_count / dd->rcv_entries.group_size; in hfi1_user_exp_rcv_setup()
335 pageidx, dd->rcv_entries.group_size, in hfi1_user_exp_rcv_setup()
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| D | pio.c | 501 static inline u32 group_size(u32 group) in group_size() function
1736 gc_end = gc + group_size(sc->group); in sc_group_release_update()
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| D | file_ops.c | 1118 uctxt->dd->rcv_entries.group_size) + in get_ctxt_info()
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| D | hfi.h | 950 u8 group_size; member
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| D | chip.c | 13480 dd->rcv_entries.group_size = RCV_INCREMENT; in set_up_context_variables()
13481 ngroups = chip_rcv_array_count(dd) / dd->rcv_entries.group_size; in set_up_context_variables()
13488 if (dd->rcv_entries.ngroups * dd->rcv_entries.group_size > in set_up_context_variables()
13491 dd->rcv_entries.group_size; in set_up_context_variables()
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| D | tid_rdma.c | 1246 ngroups = flow->npagesets / dd->rcv_entries.group_size; in kern_alloc_tids()
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer.h | 119 int group_size,
124 int group_size,
128 int group_size,
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| D | dcn10_hw_sequencer.c | 2015 int group_size, in dcn10_align_pixel_clocks() argument
2043 for (i = 0; i < group_size; i++) { in dcn10_align_pixel_clocks()
2080 for (i = 0; i < group_size; i++) { in dcn10_align_pixel_clocks()
2103 int group_size, in dcn10_enable_vblanks_synchronization() argument
2111 for (i = 1; i < group_size; i++) { in dcn10_enable_vblanks_synchronization()
2119 for (i = 0; i < group_size; i++) { in dcn10_enable_vblanks_synchronization()
2128 master = dcn10_align_pixel_clocks(dc, group_size, grouped_pipes); in dcn10_enable_vblanks_synchronization()
2133 for (i = 0; i < group_size; i++) { in dcn10_enable_vblanks_synchronization()
2148 for (i = 1; i < group_size; i++) { in dcn10_enable_vblanks_synchronization()
2160 int group_size, in dcn10_enable_timing_synchronization() argument
[all …]
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| D | hw_sequencer.h | 105 int group_size, struct pipe_ctx *grouped_pipes[]);
107 int group_index, int group_size,
110 int group_index, int group_size,
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| /drivers/gpu/drm/radeon/ |
| D | r600_cs.c | 37 … r600_cs_legacy_get_tiling_conf(struct drm_device *dev, u32 *npipes, u32 *nbanks, u32 *group_size);
42 u32 group_size; member
242 u32 group_size; member
272 *pitch_align = max((u32)64, (u32)(values->group_size / values->blocksize)); in r600_get_array_mode_alignment()
275 *base_align = values->group_size; in r600_get_array_mode_alignment()
279 (u32)(values->group_size / in r600_get_array_mode_alignment()
283 *base_align = values->group_size; in r600_get_array_mode_alignment()
287 (u32)((values->group_size * values->nbanks) / in r600_get_array_mode_alignment()
382 array_check.group_size = track->group_size; in r600_cs_track_validate_cb()
577 array_check.group_size = track->group_size; in r600_cs_track_validate_db()
[all …]
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| D | evergreen_cs.c | 42 u32 group_size; member
207 palign = MAX(64, track->group_size / surf->bpe); in evergreen_surface_check_linear_aligned()
209 surf->base_align = track->group_size; in evergreen_surface_check_linear_aligned()
229 palign = track->group_size / (8 * surf->bpe * surf->nsamples); in evergreen_surface_check_1d()
232 surf->base_align = track->group_size; in evergreen_surface_check_1d()
239 track->group_size, surf->bpe, surf->nsamples); in evergreen_surface_check_1d()
2724 track->group_size = 256; in evergreen_cs_parse()
2728 track->group_size = 512; in evergreen_cs_parse()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| D | dc.c | 1247 int group_size = 1; in program_timing_sync() local
1270 pipe_set[group_size] = unsynced_pipes[j]; in program_timing_sync()
1272 group_size++; in program_timing_sync()
1279 pipe_set[group_size] = unsynced_pipes[j]; in program_timing_sync()
1281 group_size++; in program_timing_sync()
1286 for (j = 0; j < group_size; j++) { in program_timing_sync()
1304 for (k = 0; k < group_size; k++) { in program_timing_sync()
1308 status->timing_sync_info.group_size = group_size; in program_timing_sync()
1316 for (j = j + 1; j < group_size; j++) { in program_timing_sync()
1326 group_size--; in program_timing_sync()
[all …]
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| /drivers/net/ethernet/mellanox/mlx5/core/ |
| D | fs_core.c | 629 fg->max_ftes == ft->autogroup.group_size && in del_sw_flow_group()
1262 ft->autogroup.group_size = autogroups_max_fte / (max_num_groups + 1); in mlx5_create_auto_grouped_flow_table()
1464 unsigned int group_size = 0; in alloc_auto_flow_group() local
1471 group_size = ft->autogroup.group_size; in alloc_auto_flow_group()
1474 if (group_size == 0) in alloc_auto_flow_group()
1475 group_size = 1; in alloc_auto_flow_group()
1479 if (candidate_index + group_size > fg->start_index) in alloc_auto_flow_group()
1486 if (candidate_index + group_size > max_fte) in alloc_auto_flow_group()
1493 candidate_index + group_size - 1, in alloc_auto_flow_group()
1498 if (group_size == ft->autogroup.group_size) in alloc_auto_flow_group()
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| D | fs_core.h | 180 unsigned int group_size; member
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| /drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_hw_sequencer.c | 2439 int group_size, in dce110_enable_timing_synchronization() argument
2454 for (i = 0; i < group_size; i++) in dce110_enable_timing_synchronization()
2461 for (i = 1 /* skip the master */; i < group_size; i++) in dce110_enable_timing_synchronization()
2466 for (i = 1 /* skip the master */; i < group_size; i++) { in dce110_enable_timing_synchronization()
2476 for (i = 0; i < group_size; i++) in dce110_enable_timing_synchronization()
2484 int group_size, in dce110_enable_per_frame_crtc_position_reset() argument
2494 for (i = 0; i < group_size; i++) in dce110_enable_per_frame_crtc_position_reset()
2500 for (i = 1; i < group_size; i++) in dce110_enable_per_frame_crtc_position_reset()
2507 for (i = 1; i < group_size; i++) in dce110_enable_per_frame_crtc_position_reset()
2510 for (i = 0; i < group_size; i++) in dce110_enable_per_frame_crtc_position_reset()
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| /drivers/gpu/drm/amd/display/dc/ |
| D | dc_stream.h | 37 int group_size; member
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| /drivers/md/ |
| D | dm-raid.c | 1005 unsigned int group_size, last_group_start; in validate_raid_redundancy() local
1075 group_size = (raid_disks / copies); in validate_raid_redundancy()
1076 last_group_start = (raid_disks / group_size) - 1; in validate_raid_redundancy()
1077 last_group_start *= group_size; in validate_raid_redundancy()
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| /drivers/net/ |
| D | virtio_net.c | 2155 int group_size; in virtnet_set_affinity() local
2173 group_size = stride + (i < stragglers ? 1 : 0); in virtnet_set_affinity()
2175 for (j = 0; j < group_size; j++) { in virtnet_set_affinity()
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