1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * SMP related functions
4 *
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Denis Joseph Barrow,
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
8 * Heiko Carstens <heiko.carstens@de.ibm.com>,
9 *
10 * based on other smp stuff by
11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
12 * (c) 1998 Ingo Molnar
13 *
14 * The code outside of smp.c uses logical cpu numbers, only smp.c does
15 * the translation of logical to physical cpu ids. All new code that
16 * operates on physical cpu numbers needs to go into smp.c.
17 */
18
19 #define KMSG_COMPONENT "cpu"
20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
21
22 #include <linux/workqueue.h>
23 #include <linux/memblock.h>
24 #include <linux/export.h>
25 #include <linux/init.h>
26 #include <linux/mm.h>
27 #include <linux/err.h>
28 #include <linux/spinlock.h>
29 #include <linux/kernel_stat.h>
30 #include <linux/delay.h>
31 #include <linux/interrupt.h>
32 #include <linux/irqflags.h>
33 #include <linux/irq_work.h>
34 #include <linux/cpu.h>
35 #include <linux/slab.h>
36 #include <linux/sched/hotplug.h>
37 #include <linux/sched/task_stack.h>
38 #include <linux/crash_dump.h>
39 #include <linux/kprobes.h>
40 #include <asm/asm-offsets.h>
41 #include <asm/diag.h>
42 #include <asm/switch_to.h>
43 #include <asm/facility.h>
44 #include <asm/ipl.h>
45 #include <asm/setup.h>
46 #include <asm/irq.h>
47 #include <asm/tlbflush.h>
48 #include <asm/vtimer.h>
49 #include <asm/lowcore.h>
50 #include <asm/sclp.h>
51 #include <asm/debug.h>
52 #include <asm/os_info.h>
53 #include <asm/sigp.h>
54 #include <asm/idle.h>
55 #include <asm/nmi.h>
56 #include <asm/stacktrace.h>
57 #include <asm/topology.h>
58 #include <asm/vdso.h>
59 #include "entry.h"
60
61 enum {
62 ec_schedule = 0,
63 ec_call_function_single,
64 ec_stop_cpu,
65 ec_mcck_pending,
66 ec_irq_work,
67 };
68
69 enum {
70 CPU_STATE_STANDBY,
71 CPU_STATE_CONFIGURED,
72 };
73
74 static DEFINE_PER_CPU(struct cpu *, cpu_device);
75
76 struct pcpu {
77 unsigned long ec_mask; /* bit mask for ec_xxx functions */
78 unsigned long ec_clk; /* sigp timestamp for ec_xxx */
79 signed char state; /* physical cpu state */
80 signed char polarization; /* physical polarization */
81 u16 address; /* physical cpu address */
82 };
83
84 static u8 boot_core_type;
85 static struct pcpu pcpu_devices[NR_CPUS];
86
87 unsigned int smp_cpu_mt_shift;
88 EXPORT_SYMBOL(smp_cpu_mt_shift);
89
90 unsigned int smp_cpu_mtid;
91 EXPORT_SYMBOL(smp_cpu_mtid);
92
93 #ifdef CONFIG_CRASH_DUMP
94 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
95 #endif
96
97 static unsigned int smp_max_threads __initdata = -1U;
98 cpumask_t cpu_setup_mask;
99
early_nosmt(char * s)100 static int __init early_nosmt(char *s)
101 {
102 smp_max_threads = 1;
103 return 0;
104 }
105 early_param("nosmt", early_nosmt);
106
early_smt(char * s)107 static int __init early_smt(char *s)
108 {
109 get_option(&s, &smp_max_threads);
110 return 0;
111 }
112 early_param("smt", early_smt);
113
114 /*
115 * The smp_cpu_state_mutex must be held when changing the state or polarization
116 * member of a pcpu data structure within the pcpu_devices arreay.
117 */
118 DEFINE_MUTEX(smp_cpu_state_mutex);
119
120 /*
121 * Signal processor helper functions.
122 */
__pcpu_sigp_relax(u16 addr,u8 order,unsigned long parm)123 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
124 {
125 int cc;
126
127 while (1) {
128 cc = __pcpu_sigp(addr, order, parm, NULL);
129 if (cc != SIGP_CC_BUSY)
130 return cc;
131 cpu_relax();
132 }
133 }
134
pcpu_sigp_retry(struct pcpu * pcpu,u8 order,u32 parm)135 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
136 {
137 int cc, retry;
138
139 for (retry = 0; ; retry++) {
140 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
141 if (cc != SIGP_CC_BUSY)
142 break;
143 if (retry >= 3)
144 udelay(10);
145 }
146 return cc;
147 }
148
pcpu_stopped(struct pcpu * pcpu)149 static inline int pcpu_stopped(struct pcpu *pcpu)
150 {
151 u32 status;
152
153 if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
154 0, &status) != SIGP_CC_STATUS_STORED)
155 return 0;
156 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
157 }
158
pcpu_running(struct pcpu * pcpu)159 static inline int pcpu_running(struct pcpu *pcpu)
160 {
161 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
162 0, NULL) != SIGP_CC_STATUS_STORED)
163 return 1;
164 /* Status stored condition code is equivalent to cpu not running. */
165 return 0;
166 }
167
168 /*
169 * Find struct pcpu by cpu address.
170 */
pcpu_find_address(const struct cpumask * mask,u16 address)171 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
172 {
173 int cpu;
174
175 for_each_cpu(cpu, mask)
176 if (pcpu_devices[cpu].address == address)
177 return pcpu_devices + cpu;
178 return NULL;
179 }
180
pcpu_ec_call(struct pcpu * pcpu,int ec_bit)181 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
182 {
183 int order;
184
185 if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
186 return;
187 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
188 pcpu->ec_clk = get_tod_clock_fast();
189 pcpu_sigp_retry(pcpu, order, 0);
190 }
191
pcpu_alloc_lowcore(struct pcpu * pcpu,int cpu)192 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
193 {
194 unsigned long async_stack, nodat_stack, mcck_stack;
195 struct lowcore *lc;
196
197 lc = (struct lowcore *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
198 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
199 async_stack = stack_alloc();
200 mcck_stack = stack_alloc();
201 if (!lc || !nodat_stack || !async_stack || !mcck_stack)
202 goto out;
203 memcpy(lc, &S390_lowcore, 512);
204 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
205 lc->async_stack = async_stack + STACK_INIT_OFFSET;
206 lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET;
207 lc->mcck_stack = mcck_stack + STACK_INIT_OFFSET;
208 lc->cpu_nr = cpu;
209 lc->spinlock_lockval = arch_spin_lockval(cpu);
210 lc->spinlock_index = 0;
211 lc->br_r1_trampoline = 0x07f1; /* br %r1 */
212 lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW);
213 lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW);
214 lc->preempt_count = PREEMPT_DISABLED;
215 if (nmi_alloc_per_cpu(lc))
216 goto out;
217 lowcore_ptr[cpu] = lc;
218 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
219 return 0;
220
221 out:
222 stack_free(mcck_stack);
223 stack_free(async_stack);
224 free_pages(nodat_stack, THREAD_SIZE_ORDER);
225 free_pages((unsigned long) lc, LC_ORDER);
226 return -ENOMEM;
227 }
228
pcpu_free_lowcore(struct pcpu * pcpu)229 static void pcpu_free_lowcore(struct pcpu *pcpu)
230 {
231 unsigned long async_stack, nodat_stack, mcck_stack;
232 struct lowcore *lc;
233 int cpu;
234
235 cpu = pcpu - pcpu_devices;
236 lc = lowcore_ptr[cpu];
237 nodat_stack = lc->nodat_stack - STACK_INIT_OFFSET;
238 async_stack = lc->async_stack - STACK_INIT_OFFSET;
239 mcck_stack = lc->mcck_stack - STACK_INIT_OFFSET;
240 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
241 lowcore_ptr[cpu] = NULL;
242 nmi_free_per_cpu(lc);
243 stack_free(async_stack);
244 stack_free(mcck_stack);
245 free_pages(nodat_stack, THREAD_SIZE_ORDER);
246 free_pages((unsigned long) lc, LC_ORDER);
247 }
248
pcpu_prepare_secondary(struct pcpu * pcpu,int cpu)249 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
250 {
251 struct lowcore *lc = lowcore_ptr[cpu];
252
253 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
254 cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
255 lc->cpu_nr = cpu;
256 lc->restart_flags = RESTART_FLAG_CTLREGS;
257 lc->spinlock_lockval = arch_spin_lockval(cpu);
258 lc->spinlock_index = 0;
259 lc->percpu_offset = __per_cpu_offset[cpu];
260 lc->kernel_asce = S390_lowcore.kernel_asce;
261 lc->user_asce = s390_invalid_asce;
262 lc->machine_flags = S390_lowcore.machine_flags;
263 lc->user_timer = lc->system_timer =
264 lc->steal_timer = lc->avg_steal_timer = 0;
265 __ctl_store(lc->cregs_save_area, 0, 15);
266 lc->cregs_save_area[1] = lc->kernel_asce;
267 lc->cregs_save_area[7] = lc->user_asce;
268 save_access_regs((unsigned int *) lc->access_regs_save_area);
269 arch_spin_lock_setup(cpu);
270 }
271
pcpu_attach_task(struct pcpu * pcpu,struct task_struct * tsk)272 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
273 {
274 struct lowcore *lc;
275 int cpu;
276
277 cpu = pcpu - pcpu_devices;
278 lc = lowcore_ptr[cpu];
279 lc->kernel_stack = (unsigned long) task_stack_page(tsk)
280 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
281 lc->current_task = (unsigned long) tsk;
282 lc->lpp = LPP_MAGIC;
283 lc->current_pid = tsk->pid;
284 lc->user_timer = tsk->thread.user_timer;
285 lc->guest_timer = tsk->thread.guest_timer;
286 lc->system_timer = tsk->thread.system_timer;
287 lc->hardirq_timer = tsk->thread.hardirq_timer;
288 lc->softirq_timer = tsk->thread.softirq_timer;
289 lc->steal_timer = 0;
290 }
291
pcpu_start_fn(struct pcpu * pcpu,void (* func)(void *),void * data)292 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
293 {
294 struct lowcore *lc;
295 int cpu;
296
297 cpu = pcpu - pcpu_devices;
298 lc = lowcore_ptr[cpu];
299 lc->restart_stack = lc->kernel_stack;
300 lc->restart_fn = (unsigned long) func;
301 lc->restart_data = (unsigned long) data;
302 lc->restart_source = -1U;
303 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
304 }
305
306 typedef void (pcpu_delegate_fn)(void *);
307
308 /*
309 * Call function via PSW restart on pcpu and stop the current cpu.
310 */
__pcpu_delegate(pcpu_delegate_fn * func,void * data)311 static void __pcpu_delegate(pcpu_delegate_fn *func, void *data)
312 {
313 func(data); /* should not return */
314 }
315
pcpu_delegate(struct pcpu * pcpu,pcpu_delegate_fn * func,void * data,unsigned long stack)316 static void pcpu_delegate(struct pcpu *pcpu,
317 pcpu_delegate_fn *func,
318 void *data, unsigned long stack)
319 {
320 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
321 unsigned int source_cpu = stap();
322
323 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
324 if (pcpu->address == source_cpu) {
325 call_on_stack(2, stack, void, __pcpu_delegate,
326 pcpu_delegate_fn *, func, void *, data);
327 }
328 /* Stop target cpu (if func returns this stops the current cpu). */
329 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
330 /* Restart func on the target cpu and stop the current cpu. */
331 if (lc) {
332 lc->restart_stack = stack;
333 lc->restart_fn = (unsigned long)func;
334 lc->restart_data = (unsigned long)data;
335 lc->restart_source = source_cpu;
336 } else {
337 put_abs_lowcore(restart_stack, stack);
338 put_abs_lowcore(restart_fn, (unsigned long)func);
339 put_abs_lowcore(restart_data, (unsigned long)data);
340 put_abs_lowcore(restart_source, source_cpu);
341 }
342 __bpon();
343 asm volatile(
344 "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
345 " brc 2,0b # busy, try again\n"
346 "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
347 " brc 2,1b # busy, try again\n"
348 : : "d" (pcpu->address), "d" (source_cpu),
349 "K" (SIGP_RESTART), "K" (SIGP_STOP)
350 : "0", "1", "cc");
351 for (;;) ;
352 }
353
354 /*
355 * Enable additional logical cpus for multi-threading.
356 */
pcpu_set_smt(unsigned int mtid)357 static int pcpu_set_smt(unsigned int mtid)
358 {
359 int cc;
360
361 if (smp_cpu_mtid == mtid)
362 return 0;
363 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
364 if (cc == 0) {
365 smp_cpu_mtid = mtid;
366 smp_cpu_mt_shift = 0;
367 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
368 smp_cpu_mt_shift++;
369 pcpu_devices[0].address = stap();
370 }
371 return cc;
372 }
373
374 /*
375 * Call function on an online CPU.
376 */
smp_call_online_cpu(void (* func)(void *),void * data)377 void smp_call_online_cpu(void (*func)(void *), void *data)
378 {
379 struct pcpu *pcpu;
380
381 /* Use the current cpu if it is online. */
382 pcpu = pcpu_find_address(cpu_online_mask, stap());
383 if (!pcpu)
384 /* Use the first online cpu. */
385 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
386 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
387 }
388
389 /*
390 * Call function on the ipl CPU.
391 */
smp_call_ipl_cpu(void (* func)(void *),void * data)392 void smp_call_ipl_cpu(void (*func)(void *), void *data)
393 {
394 struct lowcore *lc = lowcore_ptr[0];
395
396 if (pcpu_devices[0].address == stap())
397 lc = &S390_lowcore;
398
399 pcpu_delegate(&pcpu_devices[0], func, data,
400 lc->nodat_stack);
401 }
402
smp_find_processor_id(u16 address)403 int smp_find_processor_id(u16 address)
404 {
405 int cpu;
406
407 for_each_present_cpu(cpu)
408 if (pcpu_devices[cpu].address == address)
409 return cpu;
410 return -1;
411 }
412
schedule_mcck_handler(void)413 void schedule_mcck_handler(void)
414 {
415 pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_mcck_pending);
416 }
417
arch_vcpu_is_preempted(int cpu)418 bool notrace arch_vcpu_is_preempted(int cpu)
419 {
420 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
421 return false;
422 if (pcpu_running(pcpu_devices + cpu))
423 return false;
424 return true;
425 }
426 EXPORT_SYMBOL(arch_vcpu_is_preempted);
427
smp_yield_cpu(int cpu)428 void notrace smp_yield_cpu(int cpu)
429 {
430 if (!MACHINE_HAS_DIAG9C)
431 return;
432 diag_stat_inc_norecursion(DIAG_STAT_X09C);
433 asm volatile("diag %0,0,0x9c"
434 : : "d" (pcpu_devices[cpu].address));
435 }
436 EXPORT_SYMBOL_GPL(smp_yield_cpu);
437
438 /*
439 * Send cpus emergency shutdown signal. This gives the cpus the
440 * opportunity to complete outstanding interrupts.
441 */
smp_emergency_stop(void)442 void notrace smp_emergency_stop(void)
443 {
444 static arch_spinlock_t lock = __ARCH_SPIN_LOCK_UNLOCKED;
445 static cpumask_t cpumask;
446 u64 end;
447 int cpu;
448
449 arch_spin_lock(&lock);
450 cpumask_copy(&cpumask, cpu_online_mask);
451 cpumask_clear_cpu(smp_processor_id(), &cpumask);
452
453 end = get_tod_clock() + (1000000UL << 12);
454 for_each_cpu(cpu, &cpumask) {
455 struct pcpu *pcpu = pcpu_devices + cpu;
456 set_bit(ec_stop_cpu, &pcpu->ec_mask);
457 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
458 0, NULL) == SIGP_CC_BUSY &&
459 get_tod_clock() < end)
460 cpu_relax();
461 }
462 while (get_tod_clock() < end) {
463 for_each_cpu(cpu, &cpumask)
464 if (pcpu_stopped(pcpu_devices + cpu))
465 cpumask_clear_cpu(cpu, &cpumask);
466 if (cpumask_empty(&cpumask))
467 break;
468 cpu_relax();
469 }
470 arch_spin_unlock(&lock);
471 }
472 NOKPROBE_SYMBOL(smp_emergency_stop);
473
474 /*
475 * Stop all cpus but the current one.
476 */
smp_send_stop(void)477 void smp_send_stop(void)
478 {
479 int cpu;
480
481 /* Disable all interrupts/machine checks */
482 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
483 trace_hardirqs_off();
484
485 debug_set_critical();
486
487 if (oops_in_progress)
488 smp_emergency_stop();
489
490 /* stop all processors */
491 for_each_online_cpu(cpu) {
492 if (cpu == smp_processor_id())
493 continue;
494 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0);
495 while (!pcpu_stopped(pcpu_devices + cpu))
496 cpu_relax();
497 }
498 }
499
500 /*
501 * This is the main routine where commands issued by other
502 * cpus are handled.
503 */
smp_handle_ext_call(void)504 static void smp_handle_ext_call(void)
505 {
506 unsigned long bits;
507
508 /* handle bit signal external calls */
509 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
510 if (test_bit(ec_stop_cpu, &bits))
511 smp_stop_cpu();
512 if (test_bit(ec_schedule, &bits))
513 scheduler_ipi();
514 if (test_bit(ec_call_function_single, &bits))
515 generic_smp_call_function_single_interrupt();
516 if (test_bit(ec_mcck_pending, &bits))
517 __s390_handle_mcck();
518 if (test_bit(ec_irq_work, &bits))
519 irq_work_run();
520 }
521
do_ext_call_interrupt(struct ext_code ext_code,unsigned int param32,unsigned long param64)522 static void do_ext_call_interrupt(struct ext_code ext_code,
523 unsigned int param32, unsigned long param64)
524 {
525 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
526 smp_handle_ext_call();
527 }
528
arch_send_call_function_ipi_mask(const struct cpumask * mask)529 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
530 {
531 int cpu;
532
533 for_each_cpu(cpu, mask)
534 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
535 }
536
arch_send_call_function_single_ipi(int cpu)537 void arch_send_call_function_single_ipi(int cpu)
538 {
539 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
540 }
541
542 /*
543 * this function sends a 'reschedule' IPI to another CPU.
544 * it goes straight through and wastes no time serializing
545 * anything. Worst case is that we lose a reschedule ...
546 */
smp_send_reschedule(int cpu)547 void smp_send_reschedule(int cpu)
548 {
549 pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
550 }
551
552 #ifdef CONFIG_IRQ_WORK
arch_irq_work_raise(void)553 void arch_irq_work_raise(void)
554 {
555 pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_irq_work);
556 }
557 #endif
558
559 /*
560 * parameter area for the set/clear control bit callbacks
561 */
562 struct ec_creg_mask_parms {
563 unsigned long orval;
564 unsigned long andval;
565 int cr;
566 };
567
568 /*
569 * callback for setting/clearing control bits
570 */
smp_ctl_bit_callback(void * info)571 static void smp_ctl_bit_callback(void *info)
572 {
573 struct ec_creg_mask_parms *pp = info;
574 unsigned long cregs[16];
575
576 __ctl_store(cregs, 0, 15);
577 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
578 __ctl_load(cregs, 0, 15);
579 }
580
581 static DEFINE_SPINLOCK(ctl_lock);
582
smp_ctl_set_clear_bit(int cr,int bit,bool set)583 void smp_ctl_set_clear_bit(int cr, int bit, bool set)
584 {
585 struct ec_creg_mask_parms parms = { .cr = cr, };
586 u64 ctlreg;
587
588 if (set) {
589 parms.orval = 1UL << bit;
590 parms.andval = -1UL;
591 } else {
592 parms.orval = 0;
593 parms.andval = ~(1UL << bit);
594 }
595 spin_lock(&ctl_lock);
596 get_abs_lowcore(ctlreg, cregs_save_area[cr]);
597 ctlreg = (ctlreg & parms.andval) | parms.orval;
598 put_abs_lowcore(cregs_save_area[cr], ctlreg);
599 spin_unlock(&ctl_lock);
600 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
601 }
602 EXPORT_SYMBOL(smp_ctl_set_clear_bit);
603
604 #ifdef CONFIG_CRASH_DUMP
605
smp_store_status(int cpu)606 int smp_store_status(int cpu)
607 {
608 struct lowcore *lc;
609 struct pcpu *pcpu;
610 unsigned long pa;
611
612 pcpu = pcpu_devices + cpu;
613 lc = lowcore_ptr[cpu];
614 pa = __pa(&lc->floating_pt_save_area);
615 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
616 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
617 return -EIO;
618 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS)
619 return 0;
620 pa = __pa(lc->mcesad & MCESA_ORIGIN_MASK);
621 if (MACHINE_HAS_GS)
622 pa |= lc->mcesad & MCESA_LC_MASK;
623 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
624 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
625 return -EIO;
626 return 0;
627 }
628
629 /*
630 * Collect CPU state of the previous, crashed system.
631 * There are four cases:
632 * 1) standard zfcp/nvme dump
633 * condition: OLDMEM_BASE == NULL && is_ipl_type_dump() == true
634 * The state for all CPUs except the boot CPU needs to be collected
635 * with sigp stop-and-store-status. The boot CPU state is located in
636 * the absolute lowcore of the memory stored in the HSA. The zcore code
637 * will copy the boot CPU state from the HSA.
638 * 2) stand-alone kdump for SCSI/NVMe (zfcp/nvme dump with swapped memory)
639 * condition: OLDMEM_BASE != NULL && is_ipl_type_dump() == true
640 * The state for all CPUs except the boot CPU needs to be collected
641 * with sigp stop-and-store-status. The firmware or the boot-loader
642 * stored the registers of the boot CPU in the absolute lowcore in the
643 * memory of the old system.
644 * 3) kdump and the old kernel did not store the CPU state,
645 * or stand-alone kdump for DASD
646 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
647 * The state for all CPUs except the boot CPU needs to be collected
648 * with sigp stop-and-store-status. The kexec code or the boot-loader
649 * stored the registers of the boot CPU in the memory of the old system.
650 * 4) kdump and the old kernel stored the CPU state
651 * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
652 * This case does not exist for s390 anymore, setup_arch explicitly
653 * deactivates the elfcorehdr= kernel parameter
654 */
smp_save_cpu_vxrs(struct save_area * sa,u16 addr,bool is_boot_cpu,unsigned long page)655 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
656 bool is_boot_cpu, unsigned long page)
657 {
658 __vector128 *vxrs = (__vector128 *) page;
659
660 if (is_boot_cpu)
661 vxrs = boot_cpu_vector_save_area;
662 else
663 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
664 save_area_add_vxrs(sa, vxrs);
665 }
666
smp_save_cpu_regs(struct save_area * sa,u16 addr,bool is_boot_cpu,unsigned long page)667 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
668 bool is_boot_cpu, unsigned long page)
669 {
670 void *regs = (void *) page;
671
672 if (is_boot_cpu)
673 copy_oldmem_kernel(regs, __LC_FPREGS_SAVE_AREA, 512);
674 else
675 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
676 save_area_add_regs(sa, regs);
677 }
678
smp_save_dump_cpus(void)679 void __init smp_save_dump_cpus(void)
680 {
681 int addr, boot_cpu_addr, max_cpu_addr;
682 struct save_area *sa;
683 unsigned long page;
684 bool is_boot_cpu;
685
686 if (!(oldmem_data.start || is_ipl_type_dump()))
687 /* No previous system present, normal boot. */
688 return;
689 /* Allocate a page as dumping area for the store status sigps */
690 page = memblock_phys_alloc_range(PAGE_SIZE, PAGE_SIZE, 0, 1UL << 31);
691 if (!page)
692 panic("ERROR: Failed to allocate %lx bytes below %lx\n",
693 PAGE_SIZE, 1UL << 31);
694
695 /* Set multi-threading state to the previous system. */
696 pcpu_set_smt(sclp.mtid_prev);
697 boot_cpu_addr = stap();
698 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
699 for (addr = 0; addr <= max_cpu_addr; addr++) {
700 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
701 SIGP_CC_NOT_OPERATIONAL)
702 continue;
703 is_boot_cpu = (addr == boot_cpu_addr);
704 /* Allocate save area */
705 sa = save_area_alloc(is_boot_cpu);
706 if (!sa)
707 panic("could not allocate memory for save area\n");
708 if (MACHINE_HAS_VX)
709 /* Get the vector registers */
710 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
711 /*
712 * For a zfcp/nvme dump OLDMEM_BASE == NULL and the registers
713 * of the boot CPU are stored in the HSA. To retrieve
714 * these registers an SCLP request is required which is
715 * done by drivers/s390/char/zcore.c:init_cpu_info()
716 */
717 if (!is_boot_cpu || oldmem_data.start)
718 /* Get the CPU registers */
719 smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
720 }
721 memblock_free(page, PAGE_SIZE);
722 diag_amode31_ops.diag308_reset();
723 pcpu_set_smt(0);
724 }
725 #endif /* CONFIG_CRASH_DUMP */
726
smp_cpu_set_polarization(int cpu,int val)727 void smp_cpu_set_polarization(int cpu, int val)
728 {
729 pcpu_devices[cpu].polarization = val;
730 }
731
smp_cpu_get_polarization(int cpu)732 int smp_cpu_get_polarization(int cpu)
733 {
734 return pcpu_devices[cpu].polarization;
735 }
736
smp_cpu_get_cpu_address(int cpu)737 int smp_cpu_get_cpu_address(int cpu)
738 {
739 return pcpu_devices[cpu].address;
740 }
741
smp_get_core_info(struct sclp_core_info * info,int early)742 static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
743 {
744 static int use_sigp_detection;
745 int address;
746
747 if (use_sigp_detection || sclp_get_core_info(info, early)) {
748 use_sigp_detection = 1;
749 for (address = 0;
750 address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
751 address += (1U << smp_cpu_mt_shift)) {
752 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
753 SIGP_CC_NOT_OPERATIONAL)
754 continue;
755 info->core[info->configured].core_id =
756 address >> smp_cpu_mt_shift;
757 info->configured++;
758 }
759 info->combined = info->configured;
760 }
761 }
762
763 static int smp_add_present_cpu(int cpu);
764
smp_add_core(struct sclp_core_entry * core,cpumask_t * avail,bool configured,bool early)765 static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail,
766 bool configured, bool early)
767 {
768 struct pcpu *pcpu;
769 int cpu, nr, i;
770 u16 address;
771
772 nr = 0;
773 if (sclp.has_core_type && core->type != boot_core_type)
774 return nr;
775 cpu = cpumask_first(avail);
776 address = core->core_id << smp_cpu_mt_shift;
777 for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) {
778 if (pcpu_find_address(cpu_present_mask, address + i))
779 continue;
780 pcpu = pcpu_devices + cpu;
781 pcpu->address = address + i;
782 if (configured)
783 pcpu->state = CPU_STATE_CONFIGURED;
784 else
785 pcpu->state = CPU_STATE_STANDBY;
786 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
787 set_cpu_present(cpu, true);
788 if (!early && smp_add_present_cpu(cpu) != 0)
789 set_cpu_present(cpu, false);
790 else
791 nr++;
792 cpumask_clear_cpu(cpu, avail);
793 cpu = cpumask_next(cpu, avail);
794 }
795 return nr;
796 }
797
__smp_rescan_cpus(struct sclp_core_info * info,bool early)798 static int __smp_rescan_cpus(struct sclp_core_info *info, bool early)
799 {
800 struct sclp_core_entry *core;
801 static cpumask_t avail;
802 bool configured;
803 u16 core_id;
804 int nr, i;
805
806 cpus_read_lock();
807 mutex_lock(&smp_cpu_state_mutex);
808 nr = 0;
809 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
810 /*
811 * Add IPL core first (which got logical CPU number 0) to make sure
812 * that all SMT threads get subsequent logical CPU numbers.
813 */
814 if (early) {
815 core_id = pcpu_devices[0].address >> smp_cpu_mt_shift;
816 for (i = 0; i < info->configured; i++) {
817 core = &info->core[i];
818 if (core->core_id == core_id) {
819 nr += smp_add_core(core, &avail, true, early);
820 break;
821 }
822 }
823 }
824 for (i = 0; i < info->combined; i++) {
825 configured = i < info->configured;
826 nr += smp_add_core(&info->core[i], &avail, configured, early);
827 }
828 mutex_unlock(&smp_cpu_state_mutex);
829 cpus_read_unlock();
830 return nr;
831 }
832
smp_detect_cpus(void)833 void __init smp_detect_cpus(void)
834 {
835 unsigned int cpu, mtid, c_cpus, s_cpus;
836 struct sclp_core_info *info;
837 u16 address;
838
839 /* Get CPU information */
840 info = memblock_alloc(sizeof(*info), 8);
841 if (!info)
842 panic("%s: Failed to allocate %zu bytes align=0x%x\n",
843 __func__, sizeof(*info), 8);
844 smp_get_core_info(info, 1);
845 /* Find boot CPU type */
846 if (sclp.has_core_type) {
847 address = stap();
848 for (cpu = 0; cpu < info->combined; cpu++)
849 if (info->core[cpu].core_id == address) {
850 /* The boot cpu dictates the cpu type. */
851 boot_core_type = info->core[cpu].type;
852 break;
853 }
854 if (cpu >= info->combined)
855 panic("Could not find boot CPU type");
856 }
857
858 /* Set multi-threading state for the current system */
859 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
860 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
861 pcpu_set_smt(mtid);
862
863 /* Print number of CPUs */
864 c_cpus = s_cpus = 0;
865 for (cpu = 0; cpu < info->combined; cpu++) {
866 if (sclp.has_core_type &&
867 info->core[cpu].type != boot_core_type)
868 continue;
869 if (cpu < info->configured)
870 c_cpus += smp_cpu_mtid + 1;
871 else
872 s_cpus += smp_cpu_mtid + 1;
873 }
874 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
875
876 /* Add CPUs present at boot */
877 __smp_rescan_cpus(info, true);
878 memblock_free_early((unsigned long)info, sizeof(*info));
879 }
880
881 /*
882 * Activate a secondary processor.
883 */
smp_start_secondary(void * cpuvoid)884 static void smp_start_secondary(void *cpuvoid)
885 {
886 int cpu = raw_smp_processor_id();
887
888 S390_lowcore.last_update_clock = get_tod_clock();
889 S390_lowcore.restart_stack = (unsigned long)restart_stack;
890 S390_lowcore.restart_fn = (unsigned long)do_restart;
891 S390_lowcore.restart_data = 0;
892 S390_lowcore.restart_source = -1U;
893 S390_lowcore.restart_flags = 0;
894 restore_access_regs(S390_lowcore.access_regs_save_area);
895 cpu_init();
896 rcu_cpu_starting(cpu);
897 init_cpu_timer();
898 vtime_init();
899 vdso_getcpu_init();
900 pfault_init();
901 cpumask_set_cpu(cpu, &cpu_setup_mask);
902 update_cpu_masks();
903 notify_cpu_starting(cpu);
904 if (topology_cpu_dedicated(cpu))
905 set_cpu_flag(CIF_DEDICATED_CPU);
906 else
907 clear_cpu_flag(CIF_DEDICATED_CPU);
908 set_cpu_online(cpu, true);
909 inc_irq_stat(CPU_RST);
910 local_irq_enable();
911 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
912 }
913
914 /* Upping and downing of CPUs */
__cpu_up(unsigned int cpu,struct task_struct * tidle)915 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
916 {
917 struct pcpu *pcpu = pcpu_devices + cpu;
918 int rc;
919
920 if (pcpu->state != CPU_STATE_CONFIGURED)
921 return -EIO;
922 if (pcpu_sigp_retry(pcpu, SIGP_INITIAL_CPU_RESET, 0) !=
923 SIGP_CC_ORDER_CODE_ACCEPTED)
924 return -EIO;
925
926 rc = pcpu_alloc_lowcore(pcpu, cpu);
927 if (rc)
928 return rc;
929 pcpu_prepare_secondary(pcpu, cpu);
930 pcpu_attach_task(pcpu, tidle);
931 pcpu_start_fn(pcpu, smp_start_secondary, NULL);
932 /* Wait until cpu puts itself in the online & active maps */
933 while (!cpu_online(cpu))
934 cpu_relax();
935 return 0;
936 }
937
938 static unsigned int setup_possible_cpus __initdata;
939
_setup_possible_cpus(char * s)940 static int __init _setup_possible_cpus(char *s)
941 {
942 get_option(&s, &setup_possible_cpus);
943 return 0;
944 }
945 early_param("possible_cpus", _setup_possible_cpus);
946
__cpu_disable(void)947 int __cpu_disable(void)
948 {
949 unsigned long cregs[16];
950 int cpu;
951
952 /* Handle possible pending IPIs */
953 smp_handle_ext_call();
954 cpu = smp_processor_id();
955 set_cpu_online(cpu, false);
956 cpumask_clear_cpu(cpu, &cpu_setup_mask);
957 update_cpu_masks();
958 /* Disable pseudo page faults on this cpu. */
959 pfault_fini();
960 /* Disable interrupt sources via control register. */
961 __ctl_store(cregs, 0, 15);
962 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
963 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
964 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
965 __ctl_load(cregs, 0, 15);
966 clear_cpu_flag(CIF_NOHZ_DELAY);
967 return 0;
968 }
969
__cpu_die(unsigned int cpu)970 void __cpu_die(unsigned int cpu)
971 {
972 struct pcpu *pcpu;
973
974 /* Wait until target cpu is down */
975 pcpu = pcpu_devices + cpu;
976 while (!pcpu_stopped(pcpu))
977 cpu_relax();
978 pcpu_free_lowcore(pcpu);
979 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
980 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
981 }
982
cpu_die(void)983 void __noreturn cpu_die(void)
984 {
985 idle_task_exit();
986 __bpon();
987 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
988 for (;;) ;
989 }
990
smp_fill_possible_mask(void)991 void __init smp_fill_possible_mask(void)
992 {
993 unsigned int possible, sclp_max, cpu;
994
995 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
996 sclp_max = min(smp_max_threads, sclp_max);
997 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
998 possible = setup_possible_cpus ?: nr_cpu_ids;
999 possible = min(possible, sclp_max);
1000 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
1001 set_cpu_possible(cpu, true);
1002 }
1003
smp_prepare_cpus(unsigned int max_cpus)1004 void __init smp_prepare_cpus(unsigned int max_cpus)
1005 {
1006 /* request the 0x1201 emergency signal external interrupt */
1007 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
1008 panic("Couldn't request external interrupt 0x1201");
1009 /* request the 0x1202 external call external interrupt */
1010 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
1011 panic("Couldn't request external interrupt 0x1202");
1012 }
1013
smp_prepare_boot_cpu(void)1014 void __init smp_prepare_boot_cpu(void)
1015 {
1016 struct pcpu *pcpu = pcpu_devices;
1017
1018 WARN_ON(!cpu_present(0) || !cpu_online(0));
1019 pcpu->state = CPU_STATE_CONFIGURED;
1020 S390_lowcore.percpu_offset = __per_cpu_offset[0];
1021 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
1022 }
1023
smp_setup_processor_id(void)1024 void __init smp_setup_processor_id(void)
1025 {
1026 pcpu_devices[0].address = stap();
1027 S390_lowcore.cpu_nr = 0;
1028 S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
1029 S390_lowcore.spinlock_index = 0;
1030 }
1031
1032 /*
1033 * the frequency of the profiling timer can be changed
1034 * by writing a multiplier value into /proc/profile.
1035 *
1036 * usually you want to run this on all CPUs ;)
1037 */
setup_profiling_timer(unsigned int multiplier)1038 int setup_profiling_timer(unsigned int multiplier)
1039 {
1040 return 0;
1041 }
1042
cpu_configure_show(struct device * dev,struct device_attribute * attr,char * buf)1043 static ssize_t cpu_configure_show(struct device *dev,
1044 struct device_attribute *attr, char *buf)
1045 {
1046 ssize_t count;
1047
1048 mutex_lock(&smp_cpu_state_mutex);
1049 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
1050 mutex_unlock(&smp_cpu_state_mutex);
1051 return count;
1052 }
1053
cpu_configure_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1054 static ssize_t cpu_configure_store(struct device *dev,
1055 struct device_attribute *attr,
1056 const char *buf, size_t count)
1057 {
1058 struct pcpu *pcpu;
1059 int cpu, val, rc, i;
1060 char delim;
1061
1062 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1063 return -EINVAL;
1064 if (val != 0 && val != 1)
1065 return -EINVAL;
1066 cpus_read_lock();
1067 mutex_lock(&smp_cpu_state_mutex);
1068 rc = -EBUSY;
1069 /* disallow configuration changes of online cpus and cpu 0 */
1070 cpu = dev->id;
1071 cpu = smp_get_base_cpu(cpu);
1072 if (cpu == 0)
1073 goto out;
1074 for (i = 0; i <= smp_cpu_mtid; i++)
1075 if (cpu_online(cpu + i))
1076 goto out;
1077 pcpu = pcpu_devices + cpu;
1078 rc = 0;
1079 switch (val) {
1080 case 0:
1081 if (pcpu->state != CPU_STATE_CONFIGURED)
1082 break;
1083 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
1084 if (rc)
1085 break;
1086 for (i = 0; i <= smp_cpu_mtid; i++) {
1087 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1088 continue;
1089 pcpu[i].state = CPU_STATE_STANDBY;
1090 smp_cpu_set_polarization(cpu + i,
1091 POLARIZATION_UNKNOWN);
1092 }
1093 topology_expect_change();
1094 break;
1095 case 1:
1096 if (pcpu->state != CPU_STATE_STANDBY)
1097 break;
1098 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
1099 if (rc)
1100 break;
1101 for (i = 0; i <= smp_cpu_mtid; i++) {
1102 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1103 continue;
1104 pcpu[i].state = CPU_STATE_CONFIGURED;
1105 smp_cpu_set_polarization(cpu + i,
1106 POLARIZATION_UNKNOWN);
1107 }
1108 topology_expect_change();
1109 break;
1110 default:
1111 break;
1112 }
1113 out:
1114 mutex_unlock(&smp_cpu_state_mutex);
1115 cpus_read_unlock();
1116 return rc ? rc : count;
1117 }
1118 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1119
show_cpu_address(struct device * dev,struct device_attribute * attr,char * buf)1120 static ssize_t show_cpu_address(struct device *dev,
1121 struct device_attribute *attr, char *buf)
1122 {
1123 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
1124 }
1125 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1126
1127 static struct attribute *cpu_common_attrs[] = {
1128 &dev_attr_configure.attr,
1129 &dev_attr_address.attr,
1130 NULL,
1131 };
1132
1133 static struct attribute_group cpu_common_attr_group = {
1134 .attrs = cpu_common_attrs,
1135 };
1136
1137 static struct attribute *cpu_online_attrs[] = {
1138 &dev_attr_idle_count.attr,
1139 &dev_attr_idle_time_us.attr,
1140 NULL,
1141 };
1142
1143 static struct attribute_group cpu_online_attr_group = {
1144 .attrs = cpu_online_attrs,
1145 };
1146
smp_cpu_online(unsigned int cpu)1147 static int smp_cpu_online(unsigned int cpu)
1148 {
1149 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1150
1151 return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1152 }
1153
smp_cpu_pre_down(unsigned int cpu)1154 static int smp_cpu_pre_down(unsigned int cpu)
1155 {
1156 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1157
1158 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1159 return 0;
1160 }
1161
smp_add_present_cpu(int cpu)1162 static int smp_add_present_cpu(int cpu)
1163 {
1164 struct device *s;
1165 struct cpu *c;
1166 int rc;
1167
1168 c = kzalloc(sizeof(*c), GFP_KERNEL);
1169 if (!c)
1170 return -ENOMEM;
1171 per_cpu(cpu_device, cpu) = c;
1172 s = &c->dev;
1173 c->hotpluggable = 1;
1174 rc = register_cpu(c, cpu);
1175 if (rc)
1176 goto out;
1177 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1178 if (rc)
1179 goto out_cpu;
1180 rc = topology_cpu_init(c);
1181 if (rc)
1182 goto out_topology;
1183 return 0;
1184
1185 out_topology:
1186 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1187 out_cpu:
1188 unregister_cpu(c);
1189 out:
1190 return rc;
1191 }
1192
smp_rescan_cpus(void)1193 int __ref smp_rescan_cpus(void)
1194 {
1195 struct sclp_core_info *info;
1196 int nr;
1197
1198 info = kzalloc(sizeof(*info), GFP_KERNEL);
1199 if (!info)
1200 return -ENOMEM;
1201 smp_get_core_info(info, 0);
1202 nr = __smp_rescan_cpus(info, false);
1203 kfree(info);
1204 if (nr)
1205 topology_schedule_update();
1206 return 0;
1207 }
1208
rescan_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1209 static ssize_t __ref rescan_store(struct device *dev,
1210 struct device_attribute *attr,
1211 const char *buf,
1212 size_t count)
1213 {
1214 int rc;
1215
1216 rc = lock_device_hotplug_sysfs();
1217 if (rc)
1218 return rc;
1219 rc = smp_rescan_cpus();
1220 unlock_device_hotplug();
1221 return rc ? rc : count;
1222 }
1223 static DEVICE_ATTR_WO(rescan);
1224
s390_smp_init(void)1225 static int __init s390_smp_init(void)
1226 {
1227 int cpu, rc = 0;
1228
1229 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
1230 if (rc)
1231 return rc;
1232 for_each_present_cpu(cpu) {
1233 rc = smp_add_present_cpu(cpu);
1234 if (rc)
1235 goto out;
1236 }
1237
1238 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
1239 smp_cpu_online, smp_cpu_pre_down);
1240 rc = rc <= 0 ? rc : 0;
1241 out:
1242 return rc;
1243 }
1244 subsys_initcall(s390_smp_init);
1245
set_new_lowcore(struct lowcore * lc)1246 static __always_inline void set_new_lowcore(struct lowcore *lc)
1247 {
1248 union register_pair dst, src;
1249 u32 pfx;
1250
1251 src.even = (unsigned long) &S390_lowcore;
1252 src.odd = sizeof(S390_lowcore);
1253 dst.even = (unsigned long) lc;
1254 dst.odd = sizeof(*lc);
1255 pfx = (unsigned long) lc;
1256
1257 asm volatile(
1258 " mvcl %[dst],%[src]\n"
1259 " spx %[pfx]\n"
1260 : [dst] "+&d" (dst.pair), [src] "+&d" (src.pair)
1261 : [pfx] "Q" (pfx)
1262 : "memory", "cc");
1263 }
1264
smp_reinit_ipl_cpu(void)1265 static int __init smp_reinit_ipl_cpu(void)
1266 {
1267 unsigned long async_stack, nodat_stack, mcck_stack;
1268 struct lowcore *lc, *lc_ipl;
1269 unsigned long flags;
1270
1271 lc_ipl = lowcore_ptr[0];
1272 lc = (struct lowcore *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
1273 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
1274 async_stack = stack_alloc();
1275 mcck_stack = stack_alloc();
1276 if (!lc || !nodat_stack || !async_stack || !mcck_stack)
1277 panic("Couldn't allocate memory");
1278
1279 local_irq_save(flags);
1280 local_mcck_disable();
1281 set_new_lowcore(lc);
1282 S390_lowcore.nodat_stack = nodat_stack + STACK_INIT_OFFSET;
1283 S390_lowcore.async_stack = async_stack + STACK_INIT_OFFSET;
1284 S390_lowcore.mcck_stack = mcck_stack + STACK_INIT_OFFSET;
1285 lowcore_ptr[0] = lc;
1286 local_mcck_enable();
1287 local_irq_restore(flags);
1288
1289 free_pages(lc_ipl->async_stack - STACK_INIT_OFFSET, THREAD_SIZE_ORDER);
1290 memblock_free_late(lc_ipl->mcck_stack - STACK_INIT_OFFSET, THREAD_SIZE);
1291 memblock_free_late((unsigned long) lc_ipl, sizeof(*lc_ipl));
1292
1293 return 0;
1294 }
1295 early_initcall(smp_reinit_ipl_cpu);
1296