Lines Matching refs:mmio
599 void __iomem *mmio = pp->ctl_block; in nv_adma_register_mode() local
606 status = readw(mmio + NV_ADMA_STAT); in nv_adma_register_mode()
609 status = readw(mmio + NV_ADMA_STAT); in nv_adma_register_mode()
616 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_register_mode()
617 writew(tmp & ~NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL); in nv_adma_register_mode()
620 status = readw(mmio + NV_ADMA_STAT); in nv_adma_register_mode()
623 status = readw(mmio + NV_ADMA_STAT); in nv_adma_register_mode()
637 void __iomem *mmio = pp->ctl_block; in nv_adma_mode() local
646 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_mode()
647 writew(tmp | NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL); in nv_adma_mode()
649 status = readw(mmio + NV_ADMA_STAT); in nv_adma_mode()
653 status = readw(mmio + NV_ADMA_STAT); in nv_adma_mode()
887 void __iomem *mmio = pp->ctl_block; in nv_adma_interrupt() local
915 notifier = readl(mmio + NV_ADMA_NOTIFIER); in nv_adma_interrupt()
916 notifier_error = readl(mmio + NV_ADMA_NOTIFIER_ERROR); in nv_adma_interrupt()
926 status = readw(mmio + NV_ADMA_STAT); in nv_adma_interrupt()
934 writew(status, mmio + NV_ADMA_STAT); in nv_adma_interrupt()
935 readw(mmio + NV_ADMA_STAT); /* flush posted write */ in nv_adma_interrupt()
1015 void __iomem *mmio = pp->ctl_block; in nv_adma_freeze() local
1028 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_freeze()
1030 mmio + NV_ADMA_CTL); in nv_adma_freeze()
1031 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_freeze()
1037 void __iomem *mmio = pp->ctl_block; in nv_adma_thaw() local
1046 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_thaw()
1048 mmio + NV_ADMA_CTL); in nv_adma_thaw()
1049 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_thaw()
1055 void __iomem *mmio = pp->ctl_block; in nv_adma_irq_clear() local
1068 writew(0xffff, mmio + NV_ADMA_STAT); in nv_adma_irq_clear()
1100 void __iomem *mmio; in nv_adma_port_start() local
1121 mmio = ap->host->iomap[NV_MMIO_BAR] + NV_ADMA_PORT + in nv_adma_port_start()
1123 pp->ctl_block = mmio; in nv_adma_port_start()
1149 writel(mem_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW); in nv_adma_port_start()
1150 writel((mem_dma >> 16) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH); in nv_adma_port_start()
1164 writew(0xffff, mmio + NV_ADMA_STAT); in nv_adma_port_start()
1170 writew(0, mmio + NV_ADMA_CPB_COUNT); in nv_adma_port_start()
1173 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_port_start()
1175 NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL); in nv_adma_port_start()
1177 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_port_start()
1178 writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); in nv_adma_port_start()
1179 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_port_start()
1181 writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); in nv_adma_port_start()
1182 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_port_start()
1190 void __iomem *mmio = pp->ctl_block; in nv_adma_port_stop() local
1192 writew(0, mmio + NV_ADMA_CTL); in nv_adma_port_stop()
1199 void __iomem *mmio = pp->ctl_block; in nv_adma_port_suspend() local
1205 writew(0, mmio + NV_ADMA_CPB_COUNT); in nv_adma_port_suspend()
1208 writew(0, mmio + NV_ADMA_CTL); in nv_adma_port_suspend()
1216 void __iomem *mmio = pp->ctl_block; in nv_adma_port_resume() local
1220 writel(pp->cpb_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW); in nv_adma_port_resume()
1221 writel((pp->cpb_dma >> 16) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH); in nv_adma_port_resume()
1224 writew(0xffff, mmio + NV_ADMA_STAT); in nv_adma_port_resume()
1230 writew(0, mmio + NV_ADMA_CPB_COUNT); in nv_adma_port_resume()
1233 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_port_resume()
1235 NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL); in nv_adma_port_resume()
1237 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_port_resume()
1238 writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); in nv_adma_port_resume()
1239 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_port_resume()
1241 writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); in nv_adma_port_resume()
1242 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_port_resume()
1250 void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR]; in nv_adma_setup_port() local
1253 mmio += NV_ADMA_PORT + ap->port_no * NV_ADMA_PORT_SIZE; in nv_adma_setup_port()
1255 ioport->cmd_addr = mmio; in nv_adma_setup_port()
1256 ioport->data_addr = mmio + (ATA_REG_DATA * 4); in nv_adma_setup_port()
1258 ioport->feature_addr = mmio + (ATA_REG_ERR * 4); in nv_adma_setup_port()
1259 ioport->nsect_addr = mmio + (ATA_REG_NSECT * 4); in nv_adma_setup_port()
1260 ioport->lbal_addr = mmio + (ATA_REG_LBAL * 4); in nv_adma_setup_port()
1261 ioport->lbam_addr = mmio + (ATA_REG_LBAM * 4); in nv_adma_setup_port()
1262 ioport->lbah_addr = mmio + (ATA_REG_LBAH * 4); in nv_adma_setup_port()
1263 ioport->device_addr = mmio + (ATA_REG_DEVICE * 4); in nv_adma_setup_port()
1265 ioport->command_addr = mmio + (ATA_REG_STATUS * 4); in nv_adma_setup_port()
1267 ioport->ctl_addr = mmio + 0x20; in nv_adma_setup_port()
1394 void __iomem *mmio = pp->ctl_block; in nv_adma_qc_issue() local
1426 writew(qc->hw_tag, mmio + NV_ADMA_APPEND); in nv_adma_qc_issue()
1629 void __iomem *mmio = pp->ctl_block; in nv_adma_error_handler() local
1634 u32 notifier = readl(mmio + NV_ADMA_NOTIFIER); in nv_adma_error_handler()
1635 u32 notifier_error = readl(mmio + NV_ADMA_NOTIFIER_ERROR); in nv_adma_error_handler()
1637 u32 status = readw(mmio + NV_ADMA_STAT); in nv_adma_error_handler()
1638 u8 cpb_count = readb(mmio + NV_ADMA_CPB_COUNT); in nv_adma_error_handler()
1639 u8 next_cpb_idx = readb(mmio + NV_ADMA_NEXT_CPB_IDX); in nv_adma_error_handler()
1667 writew(0, mmio + NV_ADMA_CPB_COUNT); in nv_adma_error_handler()
1670 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_error_handler()
1671 writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); in nv_adma_error_handler()
1672 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_error_handler()
1674 writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); in nv_adma_error_handler()
1675 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_error_handler()
1809 void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR]; in nv_swncq_port_suspend() local
1813 writel(~0, mmio + NV_INT_STATUS_MCP55); in nv_swncq_port_suspend()
1816 writel(0, mmio + NV_INT_ENABLE_MCP55); in nv_swncq_port_suspend()
1819 tmp = readl(mmio + NV_CTL_MCP55); in nv_swncq_port_suspend()
1821 writel(tmp, mmio + NV_CTL_MCP55); in nv_swncq_port_suspend()
1828 void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR]; in nv_swncq_port_resume() local
1832 writel(~0, mmio + NV_INT_STATUS_MCP55); in nv_swncq_port_resume()
1835 writel(0x00fd00fd, mmio + NV_INT_ENABLE_MCP55); in nv_swncq_port_resume()
1838 tmp = readl(mmio + NV_CTL_MCP55); in nv_swncq_port_resume()
1839 writel(tmp | NV_CTL_PRI_SWNCQ | NV_CTL_SEC_SWNCQ, mmio + NV_CTL_MCP55); in nv_swncq_port_resume()
1848 void __iomem *mmio = host->iomap[NV_MMIO_BAR]; in nv_swncq_host_init() local
1858 tmp = readl(mmio + NV_CTL_MCP55); in nv_swncq_host_init()
1860 writel(tmp | NV_CTL_PRI_SWNCQ | NV_CTL_SEC_SWNCQ, mmio + NV_CTL_MCP55); in nv_swncq_host_init()
1863 tmp = readl(mmio + NV_INT_ENABLE_MCP55); in nv_swncq_host_init()
1865 writel(tmp | 0x00fd00fd, mmio + NV_INT_ENABLE_MCP55); in nv_swncq_host_init()
1868 writel(~0x0, mmio + NV_INT_STATUS_MCP55); in nv_swncq_host_init()
1920 void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR]; in nv_swncq_port_start() local
1940 pp->irq_block = mmio + NV_INT_STATUS_MCP55 + ap->port_no * 2; in nv_swncq_port_start()
1941 pp->tag_block = mmio + NV_NCQ_REG_MCP55 + ap->port_no * 2; in nv_swncq_port_start()