94 	struct device_node *child;  in tegra_gmi_parse_dt()  local
98 	child = of_get_next_available_child(gmi->dev->of_node, NULL);  in tegra_gmi_parse_dt()
99 	if (!child) {  in tegra_gmi_parse_dt()
112 	if (of_property_read_bool(child, "nvidia,snor-data-width-32bit"))  in tegra_gmi_parse_dt()
115 	if (of_property_read_bool(child, "nvidia,snor-mux-mode"))  in tegra_gmi_parse_dt()
118 	if (of_property_read_bool(child, "nvidia,snor-rdy-active-before-data"))  in tegra_gmi_parse_dt()
121 	if (of_property_read_bool(child, "nvidia,snor-rdy-active-high"))  in tegra_gmi_parse_dt()
124 	if (of_property_read_bool(child, "nvidia,snor-adv-active-high"))  in tegra_gmi_parse_dt()
127 	if (of_property_read_bool(child, "nvidia,snor-oe-active-high"))  in tegra_gmi_parse_dt()
130 	if (of_property_read_bool(child, "nvidia,snor-cs-active-high"))  in tegra_gmi_parse_dt()
134 	err = of_property_read_u32_array(child, "ranges", ranges, 4);  in tegra_gmi_parse_dt()
148 		err = of_property_read_u32(child, "reg", &property);  in tegra_gmi_parse_dt()
168 	if (!of_property_read_u32(child, "nvidia,snor-muxed-width", &property))  in tegra_gmi_parse_dt()
173 	if (!of_property_read_u32(child, "nvidia,snor-hold-width", &property))  in tegra_gmi_parse_dt()
178 	if (!of_property_read_u32(child, "nvidia,snor-adv-width", &property))  in tegra_gmi_parse_dt()
183 	if (!of_property_read_u32(child, "nvidia,snor-ce-width", &property))  in tegra_gmi_parse_dt()
188 	if (!of_property_read_u32(child, "nvidia,snor-we-width", &property))  in tegra_gmi_parse_dt()
193 	if (!of_property_read_u32(child, "nvidia,snor-oe-width", &property))  in tegra_gmi_parse_dt()
198 	if (!of_property_read_u32(child, "nvidia,snor-wait-width", &property))  in tegra_gmi_parse_dt()
204 	of_node_put(child);  in tegra_gmi_parse_dt()