Lines Matching refs:reg_base
22 static void __iomem *reg_base; variable
47 reg_save[i][1] = readl(reg_base + reg_save[i][0]); in exynos_audss_clk_suspend()
57 writel(reg_save[i][1], reg_base + reg_save[i][0]); in exynos_audss_clk_resume()
139 reg_base = devm_platform_ioremap_resource(pdev, 0); in exynos_audss_clk_probe()
140 if (IS_ERR(reg_base)) in exynos_audss_clk_probe()
141 return PTR_ERR(reg_base); in exynos_audss_clk_probe()
187 reg_base + ASS_CLK_SRC, 0, 1, 0, &lock); in exynos_audss_clk_probe()
198 reg_base + ASS_CLK_SRC, 2, 2, 0, &lock); in exynos_audss_clk_probe()
202 reg_base + ASS_CLK_DIV, 0, 4, 0, &lock); in exynos_audss_clk_probe()
206 reg_base + ASS_CLK_DIV, 4, 4, 0, &lock); in exynos_audss_clk_probe()
209 "mout_i2s", 0, reg_base + ASS_CLK_DIV, 8, 4, 0, in exynos_audss_clk_probe()
214 reg_base + ASS_CLK_GATE, 0, 0, &lock); in exynos_audss_clk_probe()
218 reg_base + ASS_CLK_GATE, 2, 0, &lock); in exynos_audss_clk_probe()
222 reg_base + ASS_CLK_GATE, 3, 0, &lock); in exynos_audss_clk_probe()
226 reg_base + ASS_CLK_GATE, 4, 0, &lock); in exynos_audss_clk_probe()
233 reg_base + ASS_CLK_GATE, 5, 0, &lock); in exynos_audss_clk_probe()
238 reg_base + ASS_CLK_GATE, 9, 0, &lock); in exynos_audss_clk_probe()