Lines Matching refs:DT_CLK
550 DT_CLK(NULL, "timer_32k_ck", "sys_32k_ck"),
551 DT_CLK(NULL, "sys_clkin_ck", "sys_clkin"),
552 DT_CLK(NULL, "dmic_gfclk", "abe-clkctrl:0018:24"),
553 DT_CLK(NULL, "dmic_sync_mux_ck", "abe-clkctrl:0018:26"),
554 DT_CLK(NULL, "dss_32khz_clk", "dss-clkctrl:0000:11"),
555 DT_CLK(NULL, "dss_48mhz_clk", "dss-clkctrl:0000:9"),
556 DT_CLK(NULL, "dss_dss_clk", "dss-clkctrl:0000:8"),
557 DT_CLK(NULL, "dss_sys_clk", "dss-clkctrl:0000:10"),
558 DT_CLK(NULL, "gpio1_dbclk", "wkupaon-clkctrl:0018:8"),
559 DT_CLK(NULL, "gpio2_dbclk", "l4per-clkctrl:0040:8"),
560 DT_CLK(NULL, "gpio3_dbclk", "l4per-clkctrl:0048:8"),
561 DT_CLK(NULL, "gpio4_dbclk", "l4per-clkctrl:0050:8"),
562 DT_CLK(NULL, "gpio5_dbclk", "l4per-clkctrl:0058:8"),
563 DT_CLK(NULL, "gpio6_dbclk", "l4per-clkctrl:0060:8"),
564 DT_CLK(NULL, "gpio7_dbclk", "l4per-clkctrl:00f0:8"),
565 DT_CLK(NULL, "gpio8_dbclk", "l4per-clkctrl:00f8:8"),
566 DT_CLK(NULL, "mcbsp1_gfclk", "abe-clkctrl:0028:24"),
567 DT_CLK(NULL, "mcbsp1_sync_mux_ck", "abe-clkctrl:0028:26"),
568 DT_CLK("40122000.mcbsp", "prcm_fck", "abe-clkctrl:0028:26"),
569 DT_CLK(NULL, "mcbsp2_gfclk", "abe-clkctrl:0030:24"),
570 DT_CLK(NULL, "mcbsp2_sync_mux_ck", "abe-clkctrl:0030:26"),
571 DT_CLK("40124000.mcbsp", "prcm_fck", "abe-clkctrl:0030:26"),
572 DT_CLK(NULL, "mcbsp3_gfclk", "abe-clkctrl:0038:24"),
573 DT_CLK(NULL, "mcbsp3_sync_mux_ck", "abe-clkctrl:0038:26"),
574 DT_CLK("40126000.mcbsp", "prcm_fck", "abe-clkctrl:0038:26"),
575 DT_CLK(NULL, "mmc1_32khz_clk", "l3init-clkctrl:0008:8"),
576 DT_CLK(NULL, "mmc1_fclk", "l3init-clkctrl:0008:25"),
577 DT_CLK(NULL, "mmc1_fclk_mux", "l3init-clkctrl:0008:24"),
578 DT_CLK(NULL, "mmc2_fclk", "l3init-clkctrl:0010:25"),
579 DT_CLK(NULL, "mmc2_fclk_mux", "l3init-clkctrl:0010:24"),
580 DT_CLK(NULL, "pad_fck", "pad_clks_ck"),
581 DT_CLK(NULL, "sata_ref_clk", "l3init-clkctrl:0068:8"),
582 DT_CLK(NULL, "timer10_gfclk_mux", "l4per-clkctrl:0008:24"),
583 DT_CLK(NULL, "timer11_gfclk_mux", "l4per-clkctrl:0010:24"),
584 DT_CLK(NULL, "timer1_gfclk_mux", "wkupaon-clkctrl:0020:24"),
585 DT_CLK(NULL, "timer2_gfclk_mux", "l4per-clkctrl:0018:24"),
586 DT_CLK(NULL, "timer3_gfclk_mux", "l4per-clkctrl:0020:24"),
587 DT_CLK(NULL, "timer4_gfclk_mux", "l4per-clkctrl:0028:24"),
588 DT_CLK(NULL, "timer5_gfclk_mux", "abe-clkctrl:0048:24"),
589 DT_CLK(NULL, "timer6_gfclk_mux", "abe-clkctrl:0050:24"),
590 DT_CLK(NULL, "timer7_gfclk_mux", "abe-clkctrl:0058:24"),
591 DT_CLK(NULL, "timer8_gfclk_mux", "abe-clkctrl:0060:24"),
592 DT_CLK(NULL, "timer9_gfclk_mux", "l4per-clkctrl:0030:24"),
593 DT_CLK(NULL, "usb_host_hs_hsic480m_p1_clk", "l3init-clkctrl:0038:13"),
594 DT_CLK(NULL, "usb_host_hs_hsic480m_p2_clk", "l3init-clkctrl:0038:14"),
595 DT_CLK(NULL, "usb_host_hs_hsic480m_p3_clk", "l3init-clkctrl:0038:7"),
596 DT_CLK(NULL, "usb_host_hs_hsic60m_p1_clk", "l3init-clkctrl:0038:11"),
597 DT_CLK(NULL, "usb_host_hs_hsic60m_p2_clk", "l3init-clkctrl:0038:12"),
598 DT_CLK(NULL, "usb_host_hs_hsic60m_p3_clk", "l3init-clkctrl:0038:6"),
599 DT_CLK(NULL, "usb_host_hs_utmi_p1_clk", "l3init-clkctrl:0038:8"),
600 DT_CLK(NULL, "usb_host_hs_utmi_p2_clk", "l3init-clkctrl:0038:9"),
601 DT_CLK(NULL, "usb_host_hs_utmi_p3_clk", "l3init-clkctrl:0038:10"),
602 DT_CLK(NULL, "usb_otg_ss_refclk960m", "l3init-clkctrl:00d0:8"),
603 DT_CLK(NULL, "usb_tll_hs_usb_ch0_clk", "l3init-clkctrl:0048:8"),
604 DT_CLK(NULL, "usb_tll_hs_usb_ch1_clk", "l3init-clkctrl:0048:9"),
605 DT_CLK(NULL, "usb_tll_hs_usb_ch2_clk", "l3init-clkctrl:0048:10"),
606 DT_CLK(NULL, "utmi_p1_gfclk", "l3init-clkctrl:0038:24"),
607 DT_CLK(NULL, "utmi_p2_gfclk", "l3init-clkctrl:0038:25"),