28 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \  argument
30 		   ADF_RING_BUNDLE_SIZE * (bank) + \
32 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \  argument
34 		   ADF_RING_BUNDLE_SIZE * (bank) + \
36 #define READ_CSR_E_STAT(csr_base_addr, bank) \  argument
38 		   ADF_RING_BUNDLE_SIZE * (bank) + ADF_RING_CSR_E_STAT)
39 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \  argument
41 		   ADF_RING_BUNDLE_SIZE * (bank) + \
43 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value)	\  argument
46 	u32 _bank = bank;						\
60 #define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value) \  argument
62 		   ADF_RING_BUNDLE_SIZE * (bank) + \
64 #define WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value) \  argument
66 		   ADF_RING_BUNDLE_SIZE * (bank) + \
68 #define WRITE_CSR_INT_FLAG(csr_base_addr, bank, value) \  argument
70 		   ADF_RING_BUNDLE_SIZE * (bank) + \
72 #define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \  argument
74 		   ADF_RING_BUNDLE_SIZE * (bank) + \
76 #define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \  argument
78 		   ADF_RING_BUNDLE_SIZE * (bank) + \
80 #define WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value) \  argument
82 		   ADF_RING_BUNDLE_SIZE * (bank) + \
85 #define WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value) \  argument
87 		   ADF_RING_BUNDLE_SIZE * (bank) + \
93 #define WRITE_CSR_RING_SRV_ARB_EN(csr_base_addr, bank, value) \  argument
95 		   ADF_RING_BUNDLE_SIZE * (bank) + \
121 #define ADF_WQM_CSR_RPRESETCTL(bank)	(0x6000 + ((bank) << 3))  argument
123 #define ADF_WQM_CSR_RPRESETSTS(bank)	(ADF_WQM_CSR_RPRESETCTL(bank) + 4)  argument