Lines Matching refs:dir
37 #define SET_RW_32(dw, dir, name, value) \ argument
39 if ((dir) == EDMA_DIR_WRITE) \
45 #define GET_RW_32(dw, dir, name) \ argument
46 ((dir) == EDMA_DIR_WRITE \
64 #define SET_RW_64(dw, dir, name, value) \ argument
66 if ((dir) == EDMA_DIR_WRITE) \
72 #define GET_RW_64(dw, dir, name) \ argument
73 ((dir) == EDMA_DIR_WRITE \
88 #define SET_RW_COMPAT(dw, dir, name, value) \ argument
90 if ((dir) == EDMA_DIR_WRITE) \
97 __dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch) in __dw_ch_regs() argument
102 if (dir == EDMA_DIR_WRITE) in __dw_ch_regs()
108 static inline void writel_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch, in writel_ch() argument
118 if (dir == EDMA_DIR_READ) in writel_ch()
131 static inline u32 readl_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch, in readl_ch() argument
143 if (dir == EDMA_DIR_READ) in readl_ch()
158 #define SET_CH_32(dw, dir, ch, name, value) \ argument
159 writel_ch(dw, dir, ch, value, &(__dw_ch_regs(dw, dir, ch)->name))
161 #define GET_CH_32(dw, dir, ch, name) \ argument
162 readl_ch(dw, dir, ch, &(__dw_ch_regs(dw, dir, ch)->name))
169 static inline void writeq_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch, in writeq_ch() argument
179 if (dir == EDMA_DIR_READ) in writeq_ch()
192 static inline u64 readq_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch, in readq_ch() argument
204 if (dir == EDMA_DIR_READ) in readq_ch()
219 #define SET_CH_64(dw, dir, ch, name, value) \ argument
220 writeq_ch(dw, dir, ch, value, &(__dw_ch_regs(dw, dir, ch)->name))
222 #define GET_CH_64(dw, dir, ch, name) \ argument
223 readq_ch(dw, dir, ch, &(__dw_ch_regs(dw, dir, ch)->name))
240 u16 dw_edma_v0_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir) in dw_edma_v0_core_ch_count() argument
244 if (dir == EDMA_DIR_WRITE) in dw_edma_v0_core_ch_count()
263 GET_CH_32(dw, chan->dir, chan->id, ch_control1)); in dw_edma_v0_core_ch_status()
277 SET_RW_32(dw, chan->dir, int_clear, in dw_edma_v0_core_clear_done_int()
285 SET_RW_32(dw, chan->dir, int_clear, in dw_edma_v0_core_clear_abort_int()
289 u32 dw_edma_v0_core_status_done_int(struct dw_edma *dw, enum dw_edma_dir dir) in dw_edma_v0_core_status_done_int() argument
292 GET_RW_32(dw, dir, int_status)); in dw_edma_v0_core_status_done_int()
295 u32 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_edma_dir dir) in dw_edma_v0_core_status_abort_int() argument
298 GET_RW_32(dw, dir, int_status)); in dw_edma_v0_core_status_abort_int()
370 SET_RW_32(dw, chan->dir, engine_en, BIT(0)); in dw_edma_v0_core_start()
374 SET_RW_COMPAT(dw, chan->dir, ch0_pwr_en, in dw_edma_v0_core_start()
378 SET_RW_COMPAT(dw, chan->dir, ch1_pwr_en, in dw_edma_v0_core_start()
382 SET_RW_COMPAT(dw, chan->dir, ch2_pwr_en, in dw_edma_v0_core_start()
386 SET_RW_COMPAT(dw, chan->dir, ch3_pwr_en, in dw_edma_v0_core_start()
390 SET_RW_COMPAT(dw, chan->dir, ch4_pwr_en, in dw_edma_v0_core_start()
394 SET_RW_COMPAT(dw, chan->dir, ch5_pwr_en, in dw_edma_v0_core_start()
398 SET_RW_COMPAT(dw, chan->dir, ch6_pwr_en, in dw_edma_v0_core_start()
402 SET_RW_COMPAT(dw, chan->dir, ch7_pwr_en, in dw_edma_v0_core_start()
408 tmp = GET_RW_32(dw, chan->dir, int_mask); in dw_edma_v0_core_start()
411 SET_RW_32(dw, chan->dir, int_mask, tmp); in dw_edma_v0_core_start()
413 tmp = GET_RW_32(dw, chan->dir, linked_list_err_en); in dw_edma_v0_core_start()
415 SET_RW_32(dw, chan->dir, linked_list_err_en, tmp); in dw_edma_v0_core_start()
417 SET_CH_32(dw, chan->dir, chan->id, ch_control1, in dw_edma_v0_core_start()
421 SET_CH_32(dw, chan->dir, chan->id, llp.lsb, in dw_edma_v0_core_start()
423 SET_CH_32(dw, chan->dir, chan->id, llp.msb, in dw_edma_v0_core_start()
427 SET_RW_32(dw, chan->dir, doorbell, in dw_edma_v0_core_start()
437 SET_RW_32(dw, chan->dir, done_imwr.lsb, chan->msi.address_lo); in dw_edma_v0_core_device_config()
438 SET_RW_32(dw, chan->dir, done_imwr.msb, chan->msi.address_hi); in dw_edma_v0_core_device_config()
440 SET_RW_32(dw, chan->dir, abort_imwr.lsb, chan->msi.address_lo); in dw_edma_v0_core_device_config()
441 SET_RW_32(dw, chan->dir, abort_imwr.msb, chan->msi.address_hi); in dw_edma_v0_core_device_config()
446 tmp = GET_RW_32(dw, chan->dir, ch01_imwr_data); in dw_edma_v0_core_device_config()
451 tmp = GET_RW_32(dw, chan->dir, ch23_imwr_data); in dw_edma_v0_core_device_config()
456 tmp = GET_RW_32(dw, chan->dir, ch45_imwr_data); in dw_edma_v0_core_device_config()
461 tmp = GET_RW_32(dw, chan->dir, ch67_imwr_data); in dw_edma_v0_core_device_config()
480 SET_RW_32(dw, chan->dir, ch01_imwr_data, tmp); in dw_edma_v0_core_device_config()
485 SET_RW_32(dw, chan->dir, ch23_imwr_data, tmp); in dw_edma_v0_core_device_config()
490 SET_RW_32(dw, chan->dir, ch45_imwr_data, tmp); in dw_edma_v0_core_device_config()
495 SET_RW_32(dw, chan->dir, ch67_imwr_data, tmp); in dw_edma_v0_core_device_config()