78 static inline int xgpio_from_bit(struct xgpio_instance *chip, int bit)  in xgpio_from_bit()  argument
80 	return bitmap_bitremap(bit, chip->hw_map, chip->sw_map, 64);  in xgpio_from_bit()
88 static inline u32 xgpio_get_value32(const unsigned long *map, int bit)  in xgpio_get_value32()  argument
90 	const size_t index = BIT_WORD(bit);  in xgpio_get_value32()
91 	const unsigned long offset = (bit % BITS_PER_LONG) & BIT(5);  in xgpio_get_value32()
96 static inline void xgpio_set_value32(unsigned long *map, int bit, u32 v)  in xgpio_set_value32()  argument
98 	const size_t index = BIT_WORD(bit);  in xgpio_set_value32()
99 	const unsigned long offset = (bit % BITS_PER_LONG) & BIT(5);  in xgpio_set_value32()
117 static void xgpio_read_ch(struct xgpio_instance *chip, int reg, int bit, unsigned long *a)  in xgpio_read_ch()  argument
119 	void __iomem *addr = chip->regs + reg + xgpio_regoffset(chip, bit / 32);  in xgpio_read_ch()
121 	xgpio_set_value32(a, bit, xgpio_readreg(addr));  in xgpio_read_ch()
124 static void xgpio_write_ch(struct xgpio_instance *chip, int reg, int bit, unsigned long *a)  in xgpio_write_ch()  argument
126 	void __iomem *addr = chip->regs + reg + xgpio_regoffset(chip, bit / 32);  in xgpio_write_ch()
128 	xgpio_writereg(addr, xgpio_get_value32(a, bit));  in xgpio_write_ch()
133 	int bit, lastbit = xgpio_to_bit(chip, chip->gc.ngpio - 1);  in xgpio_read_ch_all()  local
135 	for (bit = 0; bit <= lastbit ; bit += 32)  in xgpio_read_ch_all()
136 		xgpio_read_ch(chip, reg, bit, a);  in xgpio_read_ch_all()
141 	int bit, lastbit = xgpio_to_bit(chip, chip->gc.ngpio - 1);  in xgpio_write_ch_all()  local
143 	for (bit = 0; bit <= lastbit ; bit += 32)  in xgpio_write_ch_all()
144 		xgpio_write_ch(chip, reg, bit, a);  in xgpio_write_ch_all()
161 	int bit = xgpio_to_bit(chip, gpio);  in xgpio_get()  local
164 	xgpio_read_ch(chip, XGPIO_DATA_OFFSET, bit, state);  in xgpio_get()
166 	return test_bit(bit, state);  in xgpio_get()
182 	int bit = xgpio_to_bit(chip, gpio);  in xgpio_set()  local
187 	__assign_bit(bit, chip->state, val);  in xgpio_set()
189 	xgpio_write_ch(chip, XGPIO_DATA_OFFSET, bit, chip->state);  in xgpio_set()
239 	int bit = xgpio_to_bit(chip, gpio);  in xgpio_dir_in()  local
244 	__set_bit(bit, chip->dir);  in xgpio_dir_in()
245 	xgpio_write_ch(chip, XGPIO_TRI_OFFSET, bit, chip->dir);  in xgpio_dir_in()
268 	int bit = xgpio_to_bit(chip, gpio);  in xgpio_dir_out()  local
273 	__assign_bit(bit, chip->state, val);  in xgpio_dir_out()
274 	xgpio_write_ch(chip, XGPIO_DATA_OFFSET, bit, chip->state);  in xgpio_dir_out()
277 	__clear_bit(bit, chip->dir);  in xgpio_dir_out()
278 	xgpio_write_ch(chip, XGPIO_TRI_OFFSET, bit, chip->dir);  in xgpio_dir_out()
405 	int bit = xgpio_to_bit(chip, irq_offset);  in xgpio_irq_mask()  local
406 	u32 mask = BIT(bit / 32), temp;  in xgpio_irq_mask()
410 	__clear_bit(bit, chip->enable);  in xgpio_irq_mask()
412 	if (xgpio_get_value32(chip->enable, bit) == 0) {  in xgpio_irq_mask()
430 	int bit = xgpio_to_bit(chip, irq_offset);  in xgpio_irq_unmask()  local
431 	u32 old_enable = xgpio_get_value32(chip->enable, bit);  in xgpio_irq_unmask()
432 	u32 mask = BIT(bit / 32), val;  in xgpio_irq_unmask()
436 	__set_bit(bit, chip->enable);  in xgpio_irq_unmask()
445 		xgpio_read_ch(chip, XGPIO_DATA_OFFSET, bit, chip->last_irq_read);  in xgpio_irq_unmask()
468 	int bit = xgpio_to_bit(chip, irq_offset);  in xgpio_set_irq_type()  local
478 		__set_bit(bit, chip->rising_edge);  in xgpio_set_irq_type()
479 		__set_bit(bit, chip->falling_edge);  in xgpio_set_irq_type()
482 		__set_bit(bit, chip->rising_edge);  in xgpio_set_irq_type()
483 		__clear_bit(bit, chip->falling_edge);  in xgpio_set_irq_type()
486 		__clear_bit(bit, chip->rising_edge);  in xgpio_set_irq_type()
487 		__set_bit(bit, chip->falling_edge);  in xgpio_set_irq_type()
511 	u32 bit;  in xgpio_irqhandler()  local
539 	for_each_set_bit(bit, all, 64) {  in xgpio_irqhandler()
540 		irq_offset = xgpio_from_bit(chip, bit);  in xgpio_irqhandler()