Lines Matching refs:m
67 static int fw_domains_show(struct seq_file *m, void *data) in fw_domains_show() argument
69 struct intel_gt *gt = m->private; in fw_domains_show()
74 seq_printf(m, "user.bypass_count = %u\n", in fw_domains_show()
78 seq_printf(m, "%s.wake_count = %u\n", in fw_domains_show()
86 static void print_rc6_res(struct seq_file *m, in print_rc6_res() argument
90 struct intel_gt *gt = m->private; in print_rc6_res()
94 seq_printf(m, "%s %u (%llu us)\n", title, in print_rc6_res()
99 static int vlv_drpc(struct seq_file *m) in vlv_drpc() argument
101 struct intel_gt *gt = m->private; in vlv_drpc()
109 seq_printf(m, "RC6 Enabled: %s\n", in vlv_drpc()
112 seq_printf(m, "Multi-threaded Forcewake Request: 0x%x\n", mt_fwake_req); in vlv_drpc()
113 seq_printf(m, "Render Power Well: %s\n", in vlv_drpc()
115 seq_printf(m, "Media Power Well: %s\n", in vlv_drpc()
118 print_rc6_res(m, "Render RC6 residency since boot:", GEN6_GT_GFX_RC6); in vlv_drpc()
119 print_rc6_res(m, "Media RC6 residency since boot:", VLV_GT_MEDIA_RC6); in vlv_drpc()
121 return fw_domains_show(m, NULL); in vlv_drpc()
124 static int gen6_drpc(struct seq_file *m) in gen6_drpc() argument
126 struct intel_gt *gt = m->private; in gen6_drpc()
146 seq_printf(m, "RC1e Enabled: %s\n", in gen6_drpc()
148 seq_printf(m, "RC6 Enabled: %s\n", in gen6_drpc()
151 seq_printf(m, "Render Well Gating Enabled: %s\n", in gen6_drpc()
153 seq_printf(m, "Media Well Gating Enabled: %s\n", in gen6_drpc()
156 seq_printf(m, "Deep RC6 Enabled: %s\n", in gen6_drpc()
158 seq_printf(m, "Deepest RC6 Enabled: %s\n", in gen6_drpc()
160 seq_puts(m, "Current RC state: "); in gen6_drpc()
164 seq_puts(m, "Core Power Down\n"); in gen6_drpc()
166 seq_puts(m, "on\n"); in gen6_drpc()
169 seq_puts(m, "RC3\n"); in gen6_drpc()
172 seq_puts(m, "RC6\n"); in gen6_drpc()
175 seq_puts(m, "RC7\n"); in gen6_drpc()
178 seq_puts(m, "Unknown\n"); in gen6_drpc()
182 seq_printf(m, "Core Power Down: %s\n", in gen6_drpc()
184 seq_printf(m, "Multi-threaded Forcewake Request: 0x%x\n", mt_fwake_req); in gen6_drpc()
186 seq_printf(m, "Render Power Well: %s\n", in gen6_drpc()
189 seq_printf(m, "Media Power Well: %s\n", in gen6_drpc()
195 print_rc6_res(m, "RC6 \"Locked to RPn\" residency since boot:", in gen6_drpc()
197 print_rc6_res(m, "RC6 residency since boot:", GEN6_GT_GFX_RC6); in gen6_drpc()
198 print_rc6_res(m, "RC6+ residency since boot:", GEN6_GT_GFX_RC6p); in gen6_drpc()
199 print_rc6_res(m, "RC6++ residency since boot:", GEN6_GT_GFX_RC6pp); in gen6_drpc()
202 seq_printf(m, "RC6 voltage: %dmV\n", in gen6_drpc()
204 seq_printf(m, "RC6+ voltage: %dmV\n", in gen6_drpc()
206 seq_printf(m, "RC6++ voltage: %dmV\n", in gen6_drpc()
210 return fw_domains_show(m, NULL); in gen6_drpc()
213 static int ilk_drpc(struct seq_file *m) in ilk_drpc() argument
215 struct intel_gt *gt = m->private; in ilk_drpc()
224 seq_printf(m, "HD boost: %s\n", in ilk_drpc()
226 seq_printf(m, "Boost freq: %d\n", in ilk_drpc()
229 seq_printf(m, "HW control enabled: %s\n", in ilk_drpc()
231 seq_printf(m, "SW control enabled: %s\n", in ilk_drpc()
233 seq_printf(m, "Gated voltage change: %s\n", in ilk_drpc()
235 seq_printf(m, "Starting frequency: P%d\n", in ilk_drpc()
237 seq_printf(m, "Max P-state: P%d\n", in ilk_drpc()
239 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK)); in ilk_drpc()
240 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f)); in ilk_drpc()
241 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f)); in ilk_drpc()
242 seq_printf(m, "Render standby enabled: %s\n", in ilk_drpc()
244 seq_puts(m, "Current RS state: "); in ilk_drpc()
247 seq_puts(m, "on\n"); in ilk_drpc()
250 seq_puts(m, "RC1\n"); in ilk_drpc()
253 seq_puts(m, "RC1E\n"); in ilk_drpc()
256 seq_puts(m, "RS1\n"); in ilk_drpc()
259 seq_puts(m, "RS2 (RC6)\n"); in ilk_drpc()
262 seq_puts(m, "RC3 (RC6+)\n"); in ilk_drpc()
265 seq_puts(m, "unknown\n"); in ilk_drpc()
272 static int drpc_show(struct seq_file *m, void *unused) in drpc_show() argument
274 struct intel_gt *gt = m->private; in drpc_show()
281 err = vlv_drpc(m); in drpc_show()
283 err = gen6_drpc(m); in drpc_show()
285 err = ilk_drpc(m); in drpc_show()
514 static int frequency_show(struct seq_file *m, void *unused) in frequency_show() argument
516 struct intel_gt *gt = m->private; in frequency_show()
517 struct drm_printer p = drm_seq_file_printer(m); in frequency_show()
525 static int llc_show(struct seq_file *m, void *data) in llc_show() argument
527 struct intel_gt *gt = m->private; in llc_show()
535 seq_printf(m, "LLC: %s\n", str_yes_no(HAS_LLC(i915))); in llc_show()
536 seq_printf(m, "%s: %uMB\n", edram ? "eDRAM" : "eLLC", in llc_show()
547 seq_puts(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n"); in llc_show()
554 seq_printf(m, "%d\t\t%d\t\t\t\t%d\n", in llc_show()
591 static int rps_boost_show(struct seq_file *m, void *data) in rps_boost_show() argument
593 struct intel_gt *gt = m->private; in rps_boost_show()
597 seq_printf(m, "RPS enabled? %s\n", in rps_boost_show()
599 seq_printf(m, "RPS active? %s\n", in rps_boost_show()
601 seq_printf(m, "GPU busy? %s, %llums\n", in rps_boost_show()
604 seq_printf(m, "Boosts outstanding? %d\n", in rps_boost_show()
606 seq_printf(m, "Interactive? %d\n", READ_ONCE(rps->power.interactive)); in rps_boost_show()
607 seq_printf(m, "Frequency requested %d, actual %d\n", in rps_boost_show()
610 seq_printf(m, " min hard:%d, soft:%d; max soft:%d, hard:%d\n", in rps_boost_show()
615 seq_printf(m, " idle:%d, efficient:%d, boost:%d\n", in rps_boost_show()
620 seq_printf(m, "Wait boosts: %d\n", READ_ONCE(rps->boosts)); in rps_boost_show()
634 seq_printf(m, "\nRPS Autotuning (current \"%s\" window):\n", in rps_boost_show()
636 seq_printf(m, " Avg. up: %d%% [above threshold? %d%%]\n", in rps_boost_show()
639 seq_printf(m, " Avg. down: %d%% [below threshold? %d%%]\n", in rps_boost_show()
643 seq_puts(m, "\nRPS Autotuning inactive\n"); in rps_boost_show()