Lines Matching refs:VC4_HDMI_REG
157 #define VC4_HDMI_REG(reg, offset) _VC4_REG(VC4_HDMI, reg, offset) macro
182 VC4_HDMI_REG(HDMI_CORE_REV, 0x0000),
183 VC4_HDMI_REG(HDMI_SW_RESET_CONTROL, 0x0004),
184 VC4_HDMI_REG(HDMI_HOTPLUG_INT, 0x0008),
185 VC4_HDMI_REG(HDMI_HOTPLUG, 0x000c),
186 VC4_HDMI_REG(HDMI_FIFO_CTL, 0x005c),
187 VC4_HDMI_REG(HDMI_MAI_CHANNEL_MAP, 0x0090),
188 VC4_HDMI_REG(HDMI_MAI_CONFIG, 0x0094),
189 VC4_HDMI_REG(HDMI_MAI_FORMAT, 0x0098),
190 VC4_HDMI_REG(HDMI_AUDIO_PACKET_CONFIG, 0x009c),
191 VC4_HDMI_REG(HDMI_RAM_PACKET_CONFIG, 0x00a0),
192 VC4_HDMI_REG(HDMI_RAM_PACKET_STATUS, 0x00a4),
193 VC4_HDMI_REG(HDMI_CRP_CFG, 0x00a8),
194 VC4_HDMI_REG(HDMI_CTS_0, 0x00ac),
195 VC4_HDMI_REG(HDMI_CTS_1, 0x00b0),
196 VC4_HDMI_REG(HDMI_SCHEDULER_CONTROL, 0x00c0),
197 VC4_HDMI_REG(HDMI_HORZA, 0x00c4),
198 VC4_HDMI_REG(HDMI_HORZB, 0x00c8),
199 VC4_HDMI_REG(HDMI_VERTA0, 0x00cc),
200 VC4_HDMI_REG(HDMI_VERTB0, 0x00d0),
201 VC4_HDMI_REG(HDMI_VERTA1, 0x00d4),
202 VC4_HDMI_REG(HDMI_VERTB1, 0x00d8),
203 VC4_HDMI_REG(HDMI_MISC_CONTROL, 0x00e4),
204 VC4_HDMI_REG(HDMI_CEC_CNTRL_1, 0x00e8),
205 VC4_HDMI_REG(HDMI_CEC_CNTRL_2, 0x00ec),
206 VC4_HDMI_REG(HDMI_CEC_CNTRL_3, 0x00f0),
207 VC4_HDMI_REG(HDMI_CEC_CNTRL_4, 0x00f4),
208 VC4_HDMI_REG(HDMI_CEC_CNTRL_5, 0x00f8),
209 VC4_HDMI_REG(HDMI_CEC_TX_DATA_1, 0x00fc),
210 VC4_HDMI_REG(HDMI_CEC_TX_DATA_2, 0x0100),
211 VC4_HDMI_REG(HDMI_CEC_TX_DATA_3, 0x0104),
212 VC4_HDMI_REG(HDMI_CEC_TX_DATA_4, 0x0108),
213 VC4_HDMI_REG(HDMI_CEC_RX_DATA_1, 0x010c),
214 VC4_HDMI_REG(HDMI_CEC_RX_DATA_2, 0x0110),
215 VC4_HDMI_REG(HDMI_CEC_RX_DATA_3, 0x0114),
216 VC4_HDMI_REG(HDMI_CEC_RX_DATA_4, 0x0118),
217 VC4_HDMI_REG(HDMI_TX_PHY_RESET_CTL, 0x02c0),
218 VC4_HDMI_REG(HDMI_TX_PHY_CTL_0, 0x02c4),
219 VC4_HDMI_REG(HDMI_CEC_CPU_STATUS, 0x0340),
220 VC4_HDMI_REG(HDMI_CEC_CPU_SET, 0x0344),
221 VC4_HDMI_REG(HDMI_CEC_CPU_CLEAR, 0x0348),
222 VC4_HDMI_REG(HDMI_CEC_CPU_MASK_STATUS, 0x034c),
223 VC4_HDMI_REG(HDMI_CEC_CPU_MASK_SET, 0x0350),
224 VC4_HDMI_REG(HDMI_CEC_CPU_MASK_CLEAR, 0x0354),
225 VC4_HDMI_REG(HDMI_RAM_PACKET_START, 0x0400),
238 VC4_HDMI_REG(HDMI_FIFO_CTL, 0x074),
239 VC4_HDMI_REG(HDMI_AUDIO_PACKET_CONFIG, 0x0b8),
240 VC4_HDMI_REG(HDMI_RAM_PACKET_CONFIG, 0x0bc),
241 VC4_HDMI_REG(HDMI_RAM_PACKET_STATUS, 0x0c4),
242 VC4_HDMI_REG(HDMI_CRP_CFG, 0x0c8),
243 VC4_HDMI_REG(HDMI_CTS_0, 0x0cc),
244 VC4_HDMI_REG(HDMI_CTS_1, 0x0d0),
245 VC4_HDMI_REG(HDMI_SCHEDULER_CONTROL, 0x0e0),
246 VC4_HDMI_REG(HDMI_HORZA, 0x0e4),
247 VC4_HDMI_REG(HDMI_HORZB, 0x0e8),
248 VC4_HDMI_REG(HDMI_VERTA0, 0x0ec),
249 VC4_HDMI_REG(HDMI_VERTB0, 0x0f0),
250 VC4_HDMI_REG(HDMI_VERTA1, 0x0f4),
251 VC4_HDMI_REG(HDMI_VERTB1, 0x0f8),
252 VC4_HDMI_REG(HDMI_MISC_CONTROL, 0x100),
253 VC4_HDMI_REG(HDMI_MAI_CHANNEL_MAP, 0x09c),
254 VC4_HDMI_REG(HDMI_MAI_CONFIG, 0x0a0),
255 VC4_HDMI_REG(HDMI_FORMAT_DET_1, 0x134),
256 VC4_HDMI_REG(HDMI_FORMAT_DET_2, 0x138),
257 VC4_HDMI_REG(HDMI_FORMAT_DET_3, 0x13c),
258 VC4_HDMI_REG(HDMI_FORMAT_DET_4, 0x140),
259 VC4_HDMI_REG(HDMI_FORMAT_DET_5, 0x144),
260 VC4_HDMI_REG(HDMI_FORMAT_DET_6, 0x148),
261 VC4_HDMI_REG(HDMI_FORMAT_DET_7, 0x14c),
262 VC4_HDMI_REG(HDMI_FORMAT_DET_8, 0x150),
263 VC4_HDMI_REG(HDMI_FORMAT_DET_9, 0x154),
264 VC4_HDMI_REG(HDMI_FORMAT_DET_10, 0x158),
265 VC4_HDMI_REG(HDMI_DEEP_COLOR_CONFIG_1, 0x170),
266 VC4_HDMI_REG(HDMI_GCP_CONFIG, 0x178),
267 VC4_HDMI_REG(HDMI_GCP_WORD_1, 0x17c),
268 VC4_HDMI_REG(HDMI_HOTPLUG, 0x1a8),
269 VC4_HDMI_REG(HDMI_SCRAMBLER_CTL, 0x1c4),
331 VC4_HDMI_REG(HDMI_FIFO_CTL, 0x074),
332 VC4_HDMI_REG(HDMI_AUDIO_PACKET_CONFIG, 0x0b8),
333 VC4_HDMI_REG(HDMI_RAM_PACKET_CONFIG, 0x0bc),
334 VC4_HDMI_REG(HDMI_RAM_PACKET_STATUS, 0x0c4),
335 VC4_HDMI_REG(HDMI_CRP_CFG, 0x0c8),
336 VC4_HDMI_REG(HDMI_CTS_0, 0x0cc),
337 VC4_HDMI_REG(HDMI_CTS_1, 0x0d0),
338 VC4_HDMI_REG(HDMI_SCHEDULER_CONTROL, 0x0e0),
339 VC4_HDMI_REG(HDMI_HORZA, 0x0e4),
340 VC4_HDMI_REG(HDMI_HORZB, 0x0e8),
341 VC4_HDMI_REG(HDMI_VERTA0, 0x0ec),
342 VC4_HDMI_REG(HDMI_VERTB0, 0x0f0),
343 VC4_HDMI_REG(HDMI_VERTA1, 0x0f4),
344 VC4_HDMI_REG(HDMI_VERTB1, 0x0f8),
345 VC4_HDMI_REG(HDMI_MISC_CONTROL, 0x100),
346 VC4_HDMI_REG(HDMI_MAI_CHANNEL_MAP, 0x09c),
347 VC4_HDMI_REG(HDMI_MAI_CONFIG, 0x0a0),
348 VC4_HDMI_REG(HDMI_FORMAT_DET_1, 0x134),
349 VC4_HDMI_REG(HDMI_FORMAT_DET_2, 0x138),
350 VC4_HDMI_REG(HDMI_FORMAT_DET_3, 0x13c),
351 VC4_HDMI_REG(HDMI_FORMAT_DET_4, 0x140),
352 VC4_HDMI_REG(HDMI_FORMAT_DET_5, 0x144),
353 VC4_HDMI_REG(HDMI_FORMAT_DET_6, 0x148),
354 VC4_HDMI_REG(HDMI_FORMAT_DET_7, 0x14c),
355 VC4_HDMI_REG(HDMI_FORMAT_DET_8, 0x150),
356 VC4_HDMI_REG(HDMI_FORMAT_DET_9, 0x154),
357 VC4_HDMI_REG(HDMI_FORMAT_DET_10, 0x158),
358 VC4_HDMI_REG(HDMI_DEEP_COLOR_CONFIG_1, 0x170),
359 VC4_HDMI_REG(HDMI_GCP_CONFIG, 0x178),
360 VC4_HDMI_REG(HDMI_GCP_WORD_1, 0x17c),
361 VC4_HDMI_REG(HDMI_HOTPLUG, 0x1a8),
362 VC4_HDMI_REG(HDMI_SCRAMBLER_CTL, 0x1c4),