Lines Matching refs:intp
118 void stv0900_write_reg(struct stv0900_internal *intp, u16 reg_addr, in stv0900_write_reg() argument
124 .addr = intp->i2c_addr, in stv0900_write_reg()
134 ret = i2c_transfer(intp->i2c_adap, &i2cmsg, 1); in stv0900_write_reg()
139 u8 stv0900_read_reg(struct stv0900_internal *intp, u16 reg) in stv0900_read_reg() argument
146 .addr = intp->i2c_addr, in stv0900_read_reg()
151 .addr = intp->i2c_addr, in stv0900_read_reg()
158 ret = i2c_transfer(intp->i2c_adap, msg, 2); in stv0900_read_reg()
180 void stv0900_write_bits(struct stv0900_internal *intp, u32 label, u8 val) in stv0900_write_bits() argument
184 reg = stv0900_read_reg(intp, (label >> 16) & 0xffff); in stv0900_write_bits()
190 stv0900_write_reg(intp, (label >> 16) & 0xffff, reg); in stv0900_write_bits()
194 u8 stv0900_get_bits(struct stv0900_internal *intp, u32 label) in stv0900_get_bits() argument
201 val = stv0900_read_reg(intp, label >> 16); in stv0900_get_bits()
207 static enum fe_stv0900_error stv0900_initialize(struct stv0900_internal *intp) in stv0900_initialize() argument
211 if (intp == NULL) in stv0900_initialize()
214 intp->chip_id = stv0900_read_reg(intp, R0900_MID); in stv0900_initialize()
216 if (intp->errs != STV0900_NO_ERROR) in stv0900_initialize()
217 return intp->errs; in stv0900_initialize()
220 stv0900_write_reg(intp, R0900_P1_DMDISTATE, 0x5c); in stv0900_initialize()
221 stv0900_write_reg(intp, R0900_P2_DMDISTATE, 0x5c); in stv0900_initialize()
223 stv0900_write_reg(intp, R0900_P1_TNRCFG, 0x6c); in stv0900_initialize()
224 stv0900_write_reg(intp, R0900_P2_TNRCFG, 0x6f); in stv0900_initialize()
225 stv0900_write_reg(intp, R0900_P1_I2CRPT, 0x20); in stv0900_initialize()
226 stv0900_write_reg(intp, R0900_P2_I2CRPT, 0x20); in stv0900_initialize()
227 stv0900_write_reg(intp, R0900_NCOARSE, 0x13); in stv0900_initialize()
229 stv0900_write_reg(intp, R0900_I2CCFG, 0x08); in stv0900_initialize()
231 switch (intp->clkmode) { in stv0900_initialize()
234 stv0900_write_reg(intp, R0900_SYNTCTRL, 0x20 in stv0900_initialize()
235 | intp->clkmode); in stv0900_initialize()
239 i = 0x02 & stv0900_read_reg(intp, R0900_SYNTCTRL); in stv0900_initialize()
240 stv0900_write_reg(intp, R0900_SYNTCTRL, 0x20 | i); in stv0900_initialize()
246 stv0900_write_reg(intp, STV0900_InitVal[i][0], in stv0900_initialize()
249 if (stv0900_read_reg(intp, R0900_MID) >= 0x20) { in stv0900_initialize()
250 stv0900_write_reg(intp, R0900_TSGENERAL, 0x0c); in stv0900_initialize()
252 stv0900_write_reg(intp, STV0900_Cut20_AddOnVal[i][0], in stv0900_initialize()
256 stv0900_write_reg(intp, R0900_P1_FSPYCFG, 0x6c); in stv0900_initialize()
257 stv0900_write_reg(intp, R0900_P2_FSPYCFG, 0x6c); in stv0900_initialize()
259 stv0900_write_reg(intp, R0900_P1_PDELCTRL2, 0x01); in stv0900_initialize()
260 stv0900_write_reg(intp, R0900_P2_PDELCTRL2, 0x21); in stv0900_initialize()
262 stv0900_write_reg(intp, R0900_P1_PDELCTRL3, 0x20); in stv0900_initialize()
263 stv0900_write_reg(intp, R0900_P2_PDELCTRL3, 0x20); in stv0900_initialize()
265 stv0900_write_reg(intp, R0900_TSTRES0, 0x80); in stv0900_initialize()
266 stv0900_write_reg(intp, R0900_TSTRES0, 0x00); in stv0900_initialize()
271 static u32 stv0900_get_mclk_freq(struct stv0900_internal *intp, u32 ext_clk) in stv0900_get_mclk_freq() argument
275 div = stv0900_get_bits(intp, F0900_M_DIV); in stv0900_get_mclk_freq()
276 ad_div = ((stv0900_get_bits(intp, F0900_SELX1RATIO) == 1) ? 4 : 6); in stv0900_get_mclk_freq()
285 static enum fe_stv0900_error stv0900_set_mclk(struct stv0900_internal *intp, u32 mclk) in stv0900_set_mclk() argument
289 if (intp == NULL) in stv0900_set_mclk()
292 if (intp->errs) in stv0900_set_mclk()
296 intp->quartz); in stv0900_set_mclk()
298 clk_sel = ((stv0900_get_bits(intp, F0900_SELX1RATIO) == 1) ? 4 : 6); in stv0900_set_mclk()
299 m_div = ((clk_sel * mclk) / intp->quartz) - 1; in stv0900_set_mclk()
300 stv0900_write_bits(intp, F0900_M_DIV, m_div); in stv0900_set_mclk()
301 intp->mclk = stv0900_get_mclk_freq(intp, in stv0900_set_mclk()
302 intp->quartz); in stv0900_set_mclk()
310 m_div = intp->mclk / 704000; in stv0900_set_mclk()
311 stv0900_write_reg(intp, R0900_P1_F22TX, m_div); in stv0900_set_mclk()
312 stv0900_write_reg(intp, R0900_P1_F22RX, m_div); in stv0900_set_mclk()
314 stv0900_write_reg(intp, R0900_P2_F22TX, m_div); in stv0900_set_mclk()
315 stv0900_write_reg(intp, R0900_P2_F22RX, m_div); in stv0900_set_mclk()
317 if ((intp->errs)) in stv0900_set_mclk()
323 static u32 stv0900_get_err_count(struct stv0900_internal *intp, int cntr, in stv0900_get_err_count() argument
331 hsb = stv0900_get_bits(intp, ERR_CNT12); in stv0900_get_err_count()
332 msb = stv0900_get_bits(intp, ERR_CNT11); in stv0900_get_err_count()
333 lsb = stv0900_get_bits(intp, ERR_CNT10); in stv0900_get_err_count()
336 hsb = stv0900_get_bits(intp, ERR_CNT22); in stv0900_get_err_count()
337 msb = stv0900_get_bits(intp, ERR_CNT21); in stv0900_get_err_count()
338 lsb = stv0900_get_bits(intp, ERR_CNT20); in stv0900_get_err_count()
350 struct stv0900_internal *intp = state->internal; in stv0900_i2c_gate_ctrl() local
353 stv0900_write_bits(intp, I2CT_ON, enable); in stv0900_i2c_gate_ctrl()
358 static void stv0900_set_ts_parallel_serial(struct stv0900_internal *intp, in stv0900_set_ts_parallel_serial() argument
365 if (intp->chip_id >= 0x20) { in stv0900_set_ts_parallel_serial()
373 stv0900_write_reg(intp, R0900_TSGENERAL, in stv0900_set_ts_parallel_serial()
378 stv0900_write_reg(intp, R0900_TSGENERAL, in stv0900_set_ts_parallel_serial()
380 stv0900_write_bits(intp, in stv0900_set_ts_parallel_serial()
382 stv0900_write_bits(intp, in stv0900_set_ts_parallel_serial()
384 stv0900_write_reg(intp, in stv0900_set_ts_parallel_serial()
386 stv0900_write_reg(intp, in stv0900_set_ts_parallel_serial()
398 stv0900_write_reg(intp, in stv0900_set_ts_parallel_serial()
403 stv0900_write_reg(intp, in stv0900_set_ts_parallel_serial()
418 stv0900_write_reg(intp, R0900_TSGENERAL1X, in stv0900_set_ts_parallel_serial()
423 stv0900_write_reg(intp, R0900_TSGENERAL1X, in stv0900_set_ts_parallel_serial()
425 stv0900_write_bits(intp, in stv0900_set_ts_parallel_serial()
427 stv0900_write_bits(intp, in stv0900_set_ts_parallel_serial()
429 stv0900_write_reg(intp, R0900_P1_TSSPEED, in stv0900_set_ts_parallel_serial()
431 stv0900_write_reg(intp, R0900_P2_TSSPEED, in stv0900_set_ts_parallel_serial()
444 stv0900_write_reg(intp, R0900_TSGENERAL1X, in stv0900_set_ts_parallel_serial()
449 stv0900_write_reg(intp, R0900_TSGENERAL1X, in stv0900_set_ts_parallel_serial()
461 stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x00); in stv0900_set_ts_parallel_serial()
462 stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x00); in stv0900_set_ts_parallel_serial()
465 stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x00); in stv0900_set_ts_parallel_serial()
466 stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x01); in stv0900_set_ts_parallel_serial()
469 stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x01); in stv0900_set_ts_parallel_serial()
470 stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x00); in stv0900_set_ts_parallel_serial()
473 stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x01); in stv0900_set_ts_parallel_serial()
474 stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x01); in stv0900_set_ts_parallel_serial()
482 stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x00); in stv0900_set_ts_parallel_serial()
483 stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x00); in stv0900_set_ts_parallel_serial()
486 stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x00); in stv0900_set_ts_parallel_serial()
487 stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x01); in stv0900_set_ts_parallel_serial()
490 stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x01); in stv0900_set_ts_parallel_serial()
491 stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x00); in stv0900_set_ts_parallel_serial()
494 stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x01); in stv0900_set_ts_parallel_serial()
495 stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x01); in stv0900_set_ts_parallel_serial()
501 stv0900_write_bits(intp, F0900_P2_RST_HWARE, 1); in stv0900_set_ts_parallel_serial()
502 stv0900_write_bits(intp, F0900_P2_RST_HWARE, 0); in stv0900_set_ts_parallel_serial()
503 stv0900_write_bits(intp, F0900_P1_RST_HWARE, 1); in stv0900_set_ts_parallel_serial()
504 stv0900_write_bits(intp, F0900_P1_RST_HWARE, 0); in stv0900_set_ts_parallel_serial()
550 u32 stv0900_get_freq_auto(struct stv0900_internal *intp, int demod) in stv0900_get_freq_auto() argument
558 freq = (stv0900_get_bits(intp, TUN_RFFREQ2) << 10) + in stv0900_get_freq_auto()
559 (stv0900_get_bits(intp, TUN_RFFREQ1) << 2) + in stv0900_get_freq_auto()
560 stv0900_get_bits(intp, TUN_RFFREQ0); in stv0900_get_freq_auto()
564 round = (stv0900_get_bits(intp, TUN_RFRESTE1) >> 2) + in stv0900_get_freq_auto()
565 stv0900_get_bits(intp, TUN_RFRESTE0); in stv0900_get_freq_auto()
572 void stv0900_set_tuner_auto(struct stv0900_internal *intp, u32 Frequency, in stv0900_set_tuner_auto() argument
581 stv0900_write_bits(intp, TUN_RFFREQ2, (tunerFrequency >> 10)); in stv0900_set_tuner_auto()
582 stv0900_write_bits(intp, TUN_RFFREQ1, (tunerFrequency >> 2) & 0xff); in stv0900_set_tuner_auto()
583 stv0900_write_bits(intp, TUN_RFFREQ0, (tunerFrequency & 0x03)); in stv0900_set_tuner_auto()
585 stv0900_write_bits(intp, TUN_BW, Bandwidth / 2000000); in stv0900_set_tuner_auto()
587 stv0900_write_reg(intp, TNRLD, 1); in stv0900_set_tuner_auto()
590 static s32 stv0900_get_rf_level(struct stv0900_internal *intp, in stv0900_get_rf_level() argument
605 agc_gain = MAKEWORD(stv0900_get_bits(intp, AGCIQ_VALUE1), in stv0900_get_rf_level()
606 stv0900_get_bits(intp, AGCIQ_VALUE0)); in stv0900_get_rf_level()
662 struct stv0900_internal *intp = state->internal; in stv0900_carr_get_quality() local
683 if (stv0900_get_bits(intp, LOCK_DEFINITIF)) { in stv0900_carr_get_quality()
688 regval += MAKEWORD(stv0900_get_bits(intp, in stv0900_carr_get_quality()
690 stv0900_get_bits(intp, in stv0900_carr_get_quality()
728 struct stv0900_internal *intp = state->internal; in stv0900_read_ucblocks() local
738 err_val1 = stv0900_read_reg(intp, BBFCRCKO1); in stv0900_read_ucblocks()
739 err_val0 = stv0900_read_reg(intp, BBFCRCKO0); in stv0900_read_ucblocks()
743 err_val1 = stv0900_read_reg(intp, UPCRCKO1); in stv0900_read_ucblocks()
744 err_val0 = stv0900_read_reg(intp, UPCRCKO0); in stv0900_read_ucblocks()
768 static u32 stv0900_get_ber(struct stv0900_internal *intp, in stv0900_get_ber() argument
774 demod_state = stv0900_get_bits(intp, HEADER_MODE); in stv0900_get_ber()
786 ber += stv0900_get_err_count(intp, 0, demod); in stv0900_get_ber()
790 if (stv0900_get_bits(intp, PRFVIT)) { in stv0900_get_ber()
800 ber += stv0900_get_err_count(intp, 0, demod); in stv0900_get_ber()
804 if (stv0900_get_bits(intp, PKTDELIN_LOCK)) { in stv0900_get_ber()
825 int stv0900_get_demod_lock(struct stv0900_internal *intp, in stv0900_get_demod_lock() argument
834 dmd_state = stv0900_get_bits(intp, HEADER_MODE); in stv0900_get_demod_lock()
844 lock = stv0900_get_bits(intp, LOCK_DEFINITIF); in stv0900_get_demod_lock()
862 void stv0900_stop_all_s2_modcod(struct stv0900_internal *intp, in stv0900_stop_all_s2_modcod() argument
873 stv0900_write_reg(intp, regflist + i, 0xff); in stv0900_stop_all_s2_modcod()
876 void stv0900_activate_s2_modcod(struct stv0900_internal *intp, in stv0900_activate_s2_modcod() argument
887 if (intp->chip_id <= 0x11) { in stv0900_activate_s2_modcod()
890 mod_code = stv0900_read_reg(intp, PLHMODCOD); in stv0900_activate_s2_modcod()
916 stv0900_write_reg(intp, reg_index, in stv0900_activate_s2_modcod()
919 stv0900_write_reg(intp, reg_index, in stv0900_activate_s2_modcod()
923 } else if (intp->chip_id >= 0x12) { in stv0900_activate_s2_modcod()
925 stv0900_write_reg(intp, MODCODLST0 + reg_index, 0xff); in stv0900_activate_s2_modcod()
927 stv0900_write_reg(intp, MODCODLSTE, 0xff); in stv0900_activate_s2_modcod()
928 stv0900_write_reg(intp, MODCODLSTF, 0xcf); in stv0900_activate_s2_modcod()
930 stv0900_write_reg(intp, MODCODLST7 + reg_index, 0xcc); in stv0900_activate_s2_modcod()
936 void stv0900_activate_s2_modcod_single(struct stv0900_internal *intp, in stv0900_activate_s2_modcod_single() argument
943 stv0900_write_reg(intp, MODCODLST0, 0xff); in stv0900_activate_s2_modcod_single()
944 stv0900_write_reg(intp, MODCODLST1, 0xf0); in stv0900_activate_s2_modcod_single()
945 stv0900_write_reg(intp, MODCODLSTF, 0x0f); in stv0900_activate_s2_modcod_single()
947 stv0900_write_reg(intp, MODCODLST2 + reg_index, 0); in stv0900_activate_s2_modcod_single()
956 void stv0900_start_search(struct stv0900_internal *intp, in stv0900_start_search() argument
962 stv0900_write_bits(intp, DEMOD_MODE, 0x1f); in stv0900_start_search()
963 if (intp->chip_id == 0x10) in stv0900_start_search()
964 stv0900_write_reg(intp, CORRELEXP, 0xaa); in stv0900_start_search()
966 if (intp->chip_id < 0x20) in stv0900_start_search()
967 stv0900_write_reg(intp, CARHDR, 0x55); in stv0900_start_search()
969 if (intp->chip_id <= 0x20) { in stv0900_start_search()
970 if (intp->symbol_rate[0] <= 5000000) { in stv0900_start_search()
971 stv0900_write_reg(intp, CARCFG, 0x44); in stv0900_start_search()
972 stv0900_write_reg(intp, CFRUP1, 0x0f); in stv0900_start_search()
973 stv0900_write_reg(intp, CFRUP0, 0xff); in stv0900_start_search()
974 stv0900_write_reg(intp, CFRLOW1, 0xf0); in stv0900_start_search()
975 stv0900_write_reg(intp, CFRLOW0, 0x00); in stv0900_start_search()
976 stv0900_write_reg(intp, RTCS2, 0x68); in stv0900_start_search()
978 stv0900_write_reg(intp, CARCFG, 0xc4); in stv0900_start_search()
979 stv0900_write_reg(intp, RTCS2, 0x44); in stv0900_start_search()
983 if (intp->symbol_rate[demod] <= 5000000) in stv0900_start_search()
984 stv0900_write_reg(intp, RTCS2, 0x68); in stv0900_start_search()
986 stv0900_write_reg(intp, RTCS2, 0x44); in stv0900_start_search()
988 stv0900_write_reg(intp, CARCFG, 0x46); in stv0900_start_search()
989 if (intp->srch_algo[demod] == STV0900_WARM_START) { in stv0900_start_search()
991 freq /= (intp->mclk / 1000); in stv0900_start_search()
994 freq = (intp->srch_range[demod] / 2000); in stv0900_start_search()
995 if (intp->symbol_rate[demod] <= 5000000) in stv0900_start_search()
1001 freq /= (intp->mclk / 1000); in stv0900_start_search()
1005 stv0900_write_bits(intp, CFR_UP1, MSB(freq_s16)); in stv0900_start_search()
1006 stv0900_write_bits(intp, CFR_UP0, LSB(freq_s16)); in stv0900_start_search()
1008 stv0900_write_bits(intp, CFR_LOW1, MSB(freq_s16)); in stv0900_start_search()
1009 stv0900_write_bits(intp, CFR_LOW0, LSB(freq_s16)); in stv0900_start_search()
1012 stv0900_write_reg(intp, CFRINIT1, 0); in stv0900_start_search()
1013 stv0900_write_reg(intp, CFRINIT0, 0); in stv0900_start_search()
1015 if (intp->chip_id >= 0x20) { in stv0900_start_search()
1016 stv0900_write_reg(intp, EQUALCFG, 0x41); in stv0900_start_search()
1017 stv0900_write_reg(intp, FFECFG, 0x41); in stv0900_start_search()
1019 if ((intp->srch_standard[demod] == STV0900_SEARCH_DVBS1) || in stv0900_start_search()
1020 (intp->srch_standard[demod] == STV0900_SEARCH_DSS) || in stv0900_start_search()
1021 (intp->srch_standard[demod] == STV0900_AUTO_SEARCH)) { in stv0900_start_search()
1022 stv0900_write_reg(intp, VITSCALE, in stv0900_start_search()
1024 stv0900_write_reg(intp, VAVSRVIT, 0x0); in stv0900_start_search()
1028 stv0900_write_reg(intp, SFRSTEP, 0x00); in stv0900_start_search()
1029 stv0900_write_reg(intp, TMGTHRISE, 0xe0); in stv0900_start_search()
1030 stv0900_write_reg(intp, TMGTHFALL, 0xc0); in stv0900_start_search()
1031 stv0900_write_bits(intp, SCAN_ENABLE, 0); in stv0900_start_search()
1032 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_start_search()
1033 stv0900_write_bits(intp, S1S2_SEQUENTIAL, 0); in stv0900_start_search()
1034 stv0900_write_reg(intp, RTC, 0x88); in stv0900_start_search()
1035 if (intp->chip_id >= 0x20) { in stv0900_start_search()
1036 if (intp->symbol_rate[demod] < 2000000) { in stv0900_start_search()
1037 if (intp->chip_id <= 0x20) in stv0900_start_search()
1038 stv0900_write_reg(intp, CARFREQ, 0x39); in stv0900_start_search()
1040 stv0900_write_reg(intp, CARFREQ, 0x89); in stv0900_start_search()
1042 stv0900_write_reg(intp, CARHDR, 0x40); in stv0900_start_search()
1043 } else if (intp->symbol_rate[demod] < 10000000) { in stv0900_start_search()
1044 stv0900_write_reg(intp, CARFREQ, 0x4c); in stv0900_start_search()
1045 stv0900_write_reg(intp, CARHDR, 0x20); in stv0900_start_search()
1047 stv0900_write_reg(intp, CARFREQ, 0x4b); in stv0900_start_search()
1048 stv0900_write_reg(intp, CARHDR, 0x20); in stv0900_start_search()
1052 if (intp->symbol_rate[demod] < 10000000) in stv0900_start_search()
1053 stv0900_write_reg(intp, CARFREQ, 0xef); in stv0900_start_search()
1055 stv0900_write_reg(intp, CARFREQ, 0xed); in stv0900_start_search()
1058 switch (intp->srch_algo[demod]) { in stv0900_start_search()
1060 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_start_search()
1061 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_start_search()
1064 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_start_search()
1065 stv0900_write_reg(intp, DMDISTATE, 0x15); in stv0900_start_search()
1258 enum fe_stv0900_error stv0900_st_dvbs2_single(struct stv0900_internal *intp, in stv0900_st_dvbs2_single() argument
1269 if ((intp->demod_mode != STV0900_DUAL) in stv0900_st_dvbs2_single()
1270 || (stv0900_get_bits(intp, F0900_DDEMOD) != 1)) { in stv0900_st_dvbs2_single()
1271 stv0900_write_reg(intp, R0900_GENCFG, 0x1d); in stv0900_st_dvbs2_single()
1273 intp->demod_mode = STV0900_DUAL; in stv0900_st_dvbs2_single()
1275 stv0900_write_bits(intp, F0900_FRESFEC, 1); in stv0900_st_dvbs2_single()
1276 stv0900_write_bits(intp, F0900_FRESFEC, 0); in stv0900_st_dvbs2_single()
1279 stv0900_write_reg(intp, in stv0900_st_dvbs2_single()
1283 stv0900_write_reg(intp, in stv0900_st_dvbs2_single()
1287 stv0900_write_reg(intp, R0900_P1_MODCODLSTE, 0xff); in stv0900_st_dvbs2_single()
1288 stv0900_write_reg(intp, R0900_P1_MODCODLSTF, 0xcf); in stv0900_st_dvbs2_single()
1291 stv0900_write_reg(intp, in stv0900_st_dvbs2_single()
1295 stv0900_write_reg(intp, in stv0900_st_dvbs2_single()
1299 stv0900_write_reg(intp, R0900_P2_MODCODLSTE, 0xff); in stv0900_st_dvbs2_single()
1300 stv0900_write_reg(intp, R0900_P2_MODCODLSTF, 0xcf); in stv0900_st_dvbs2_single()
1306 stv0900_stop_all_s2_modcod(intp, STV0900_DEMOD_1); in stv0900_st_dvbs2_single()
1307 stv0900_activate_s2_modcod_single(intp, in stv0900_st_dvbs2_single()
1309 stv0900_write_reg(intp, R0900_GENCFG, 0x06); in stv0900_st_dvbs2_single()
1311 stv0900_stop_all_s2_modcod(intp, STV0900_DEMOD_2); in stv0900_st_dvbs2_single()
1312 stv0900_activate_s2_modcod_single(intp, in stv0900_st_dvbs2_single()
1314 stv0900_write_reg(intp, R0900_GENCFG, 0x04); in stv0900_st_dvbs2_single()
1317 intp->demod_mode = STV0900_SINGLE; in stv0900_st_dvbs2_single()
1319 stv0900_write_bits(intp, F0900_FRESFEC, 1); in stv0900_st_dvbs2_single()
1320 stv0900_write_bits(intp, F0900_FRESFEC, 0); in stv0900_st_dvbs2_single()
1321 stv0900_write_bits(intp, F0900_P1_ALGOSWRST, 1); in stv0900_st_dvbs2_single()
1322 stv0900_write_bits(intp, F0900_P1_ALGOSWRST, 0); in stv0900_st_dvbs2_single()
1323 stv0900_write_bits(intp, F0900_P2_ALGOSWRST, 1); in stv0900_st_dvbs2_single()
1324 stv0900_write_bits(intp, F0900_P2_ALGOSWRST, 0); in stv0900_st_dvbs2_single()
1337 struct stv0900_internal *intp = NULL; in stv0900_init_internal() local
1386 intp = state->internal; in stv0900_init_internal()
1388 intp->demod_mode = p_init->demod_mode; in stv0900_init_internal()
1389 stv0900_st_dvbs2_single(intp, intp->demod_mode, STV0900_DEMOD_1); in stv0900_init_internal()
1390 intp->chip_id = stv0900_read_reg(intp, R0900_MID); in stv0900_init_internal()
1391 intp->rolloff = p_init->rolloff; in stv0900_init_internal()
1392 intp->quartz = p_init->dmd_ref_clk; in stv0900_init_internal()
1394 stv0900_write_bits(intp, F0900_P1_ROLLOFF_CONTROL, p_init->rolloff); in stv0900_init_internal()
1395 stv0900_write_bits(intp, F0900_P2_ROLLOFF_CONTROL, p_init->rolloff); in stv0900_init_internal()
1397 intp->ts_config = p_init->ts_config; in stv0900_init_internal()
1398 if (intp->ts_config == NULL) in stv0900_init_internal()
1399 stv0900_set_ts_parallel_serial(intp, in stv0900_init_internal()
1403 for (i = 0; intp->ts_config[i].addr != 0xffff; i++) in stv0900_init_internal()
1404 stv0900_write_reg(intp, in stv0900_init_internal()
1405 intp->ts_config[i].addr, in stv0900_init_internal()
1406 intp->ts_config[i].val); in stv0900_init_internal()
1408 stv0900_write_bits(intp, F0900_P2_RST_HWARE, 1); in stv0900_init_internal()
1409 stv0900_write_bits(intp, F0900_P2_RST_HWARE, 0); in stv0900_init_internal()
1410 stv0900_write_bits(intp, F0900_P1_RST_HWARE, 1); in stv0900_init_internal()
1411 stv0900_write_bits(intp, F0900_P1_RST_HWARE, 0); in stv0900_init_internal()
1414 intp->tuner_type[0] = p_init->tuner1_type; in stv0900_init_internal()
1415 intp->tuner_type[1] = p_init->tuner2_type; in stv0900_init_internal()
1419 stv0900_write_reg(intp, R0900_P1_TNRCFG, 0x3c); in stv0900_init_internal()
1420 stv0900_write_reg(intp, R0900_P1_TNRCFG2, 0x86); in stv0900_init_internal()
1421 stv0900_write_reg(intp, R0900_P1_TNRCFG3, 0x18); in stv0900_init_internal()
1422 stv0900_write_reg(intp, R0900_P1_TNRXTAL, 27); /* 27MHz */ in stv0900_init_internal()
1423 stv0900_write_reg(intp, R0900_P1_TNRSTEPS, 0x05); in stv0900_init_internal()
1424 stv0900_write_reg(intp, R0900_P1_TNRGAIN, 0x17); in stv0900_init_internal()
1425 stv0900_write_reg(intp, R0900_P1_TNRADJ, 0x1f); in stv0900_init_internal()
1426 stv0900_write_reg(intp, R0900_P1_TNRCTL2, 0x0); in stv0900_init_internal()
1427 stv0900_write_bits(intp, F0900_P1_TUN_TYPE, 3); in stv0900_init_internal()
1431 stv0900_write_bits(intp, F0900_P1_TUN_TYPE, 6); in stv0900_init_internal()
1435 stv0900_write_bits(intp, F0900_P1_TUN_MADDRESS, p_init->tun1_maddress); in stv0900_init_internal()
1438 stv0900_write_reg(intp, R0900_TSTTNR1, 0x26); in stv0900_init_internal()
1444 stv0900_write_reg(intp, R0900_P1_TNRLD, 1); /* hw tuner */ in stv0900_init_internal()
1449 stv0900_write_reg(intp, R0900_P2_TNRCFG, 0x3c); in stv0900_init_internal()
1450 stv0900_write_reg(intp, R0900_P2_TNRCFG2, 0x86); in stv0900_init_internal()
1451 stv0900_write_reg(intp, R0900_P2_TNRCFG3, 0x18); in stv0900_init_internal()
1452 stv0900_write_reg(intp, R0900_P2_TNRXTAL, 27); /* 27MHz */ in stv0900_init_internal()
1453 stv0900_write_reg(intp, R0900_P2_TNRSTEPS, 0x05); in stv0900_init_internal()
1454 stv0900_write_reg(intp, R0900_P2_TNRGAIN, 0x17); in stv0900_init_internal()
1455 stv0900_write_reg(intp, R0900_P2_TNRADJ, 0x1f); in stv0900_init_internal()
1456 stv0900_write_reg(intp, R0900_P2_TNRCTL2, 0x0); in stv0900_init_internal()
1457 stv0900_write_bits(intp, F0900_P2_TUN_TYPE, 3); in stv0900_init_internal()
1461 stv0900_write_bits(intp, F0900_P2_TUN_TYPE, 6); in stv0900_init_internal()
1465 stv0900_write_bits(intp, F0900_P2_TUN_MADDRESS, p_init->tun2_maddress); in stv0900_init_internal()
1468 stv0900_write_reg(intp, R0900_TSTTNR3, 0x26); in stv0900_init_internal()
1474 stv0900_write_reg(intp, R0900_P2_TNRLD, 1); /* hw tuner */ in stv0900_init_internal()
1476 stv0900_write_bits(intp, F0900_P1_TUN_IQSWAP, p_init->tun1_iq_inv); in stv0900_init_internal()
1477 stv0900_write_bits(intp, F0900_P2_TUN_IQSWAP, p_init->tun2_iq_inv); in stv0900_init_internal()
1478 stv0900_set_mclk(intp, 135000000); in stv0900_init_internal()
1481 switch (intp->clkmode) { in stv0900_init_internal()
1484 stv0900_write_reg(intp, R0900_SYNTCTRL, 0x20 | intp->clkmode); in stv0900_init_internal()
1487 selosci = 0x02 & stv0900_read_reg(intp, R0900_SYNTCTRL); in stv0900_init_internal()
1488 stv0900_write_reg(intp, R0900_SYNTCTRL, 0x20 | selosci); in stv0900_init_internal()
1493 intp->mclk = stv0900_get_mclk_freq(intp, intp->quartz); in stv0900_init_internal()
1494 if (intp->errs) in stv0900_init_internal()
1500 static int stv0900_status(struct stv0900_internal *intp, in stv0900_status() argument
1508 demod_state = stv0900_get_bits(intp, HEADER_MODE); in stv0900_status()
1516 locked = stv0900_get_bits(intp, LOCK_DEFINITIF) && in stv0900_status()
1517 stv0900_get_bits(intp, PKTDELIN_LOCK) && in stv0900_status()
1518 stv0900_get_bits(intp, TSFIFO_LINEOK); in stv0900_status()
1521 locked = stv0900_get_bits(intp, LOCK_DEFINITIF) && in stv0900_status()
1522 stv0900_get_bits(intp, LOCKEDVIT) && in stv0900_status()
1523 stv0900_get_bits(intp, TSFIFO_LINEOK); in stv0900_status()
1531 tsbitrate0_val = stv0900_read_reg(intp, TSBITRATE0); in stv0900_status()
1532 tsbitrate1_val = stv0900_read_reg(intp, TSBITRATE1); in stv0900_status()
1534 bitrate = (stv0900_get_mclk_freq(intp, intp->quartz)/1000000) in stv0900_status()
1543 static int stv0900_set_mis(struct stv0900_internal *intp, in stv0900_set_mis() argument
1550 stv0900_write_bits(intp, FILTER_EN, 0); in stv0900_set_mis()
1553 stv0900_write_bits(intp, FILTER_EN, 1); in stv0900_set_mis()
1554 stv0900_write_reg(intp, ISIENTRY, mis); in stv0900_set_mis()
1555 stv0900_write_reg(intp, ISIBITENA, 0xff); in stv0900_set_mis()
1565 struct stv0900_internal *intp = state->internal; in stv0900_search() local
1570 struct stv0900_signal_info p_result = intp->result[demod]; in stv0900_search()
1582 stv0900_set_mis(intp, demod, c->stream_id); in stv0900_search()
1597 intp->srch_standard[demod] = p_search.standard; in stv0900_search()
1598 intp->symbol_rate[demod] = p_search.symbol_rate; in stv0900_search()
1599 intp->srch_range[demod] = p_search.search_range; in stv0900_search()
1600 intp->freq[demod] = p_search.frequency; in stv0900_search()
1601 intp->srch_algo[demod] = p_search.search_algo; in stv0900_search()
1602 intp->srch_iq_inv[demod] = p_search.iq_inversion; in stv0900_search()
1603 intp->fec[demod] = p_search.fec; in stv0900_search()
1605 (intp->errs == STV0900_NO_ERROR)) { in stv0900_search()
1606 p_result.locked = intp->result[demod].locked; in stv0900_search()
1607 p_result.standard = intp->result[demod].standard; in stv0900_search()
1608 p_result.frequency = intp->result[demod].frequency; in stv0900_search()
1609 p_result.symbol_rate = intp->result[demod].symbol_rate; in stv0900_search()
1610 p_result.fec = intp->result[demod].fec; in stv0900_search()
1611 p_result.modcode = intp->result[demod].modcode; in stv0900_search()
1612 p_result.pilot = intp->result[demod].pilot; in stv0900_search()
1613 p_result.frame_len = intp->result[demod].frame_len; in stv0900_search()
1614 p_result.spectrum = intp->result[demod].spectrum; in stv0900_search()
1615 p_result.rolloff = intp->result[demod].rolloff; in stv0900_search()
1616 p_result.modulation = intp->result[demod].modulation; in stv0900_search()
1619 switch (intp->err[demod]) { in stv0900_search()
1668 struct stv0900_internal *intp = state->internal; in stv0900_stop_ts() local
1672 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_stop_ts()
1674 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_stop_ts()
1682 struct stv0900_internal *intp = state->internal; in stv0900_diseqc_init() local
1685 stv0900_write_bits(intp, DISTX_MODE, state->config->diseqc_mode); in stv0900_diseqc_init()
1686 stv0900_write_bits(intp, DISEQC_RESET, 1); in stv0900_diseqc_init()
1687 stv0900_write_bits(intp, DISEQC_RESET, 0); in stv0900_diseqc_init()
1702 static int stv0900_diseqc_send(struct stv0900_internal *intp , u8 *data, in stv0900_diseqc_send() argument
1707 stv0900_write_bits(intp, DIS_PRECHARGE, 1); in stv0900_diseqc_send()
1709 while (stv0900_get_bits(intp, FIFO_FULL)) in stv0900_diseqc_send()
1711 stv0900_write_reg(intp, DISTXDATA, data[i]); in stv0900_diseqc_send()
1715 stv0900_write_bits(intp, DIS_PRECHARGE, 0); in stv0900_diseqc_send()
1717 while ((stv0900_get_bits(intp, TX_IDLE) != 1) && (i < 10)) { in stv0900_diseqc_send()
1740 struct stv0900_internal *intp = state->internal; in stv0900_send_burst() local
1747 stv0900_write_bits(intp, DISTX_MODE, 3);/* Unmodulated */ in stv0900_send_burst()
1749 stv0900_diseqc_send(intp, &data, 1, state->demod); in stv0900_send_burst()
1752 stv0900_write_bits(intp, DISTX_MODE, 2);/* Modulated */ in stv0900_send_burst()
1754 stv0900_diseqc_send(intp, &data, 1, state->demod); in stv0900_send_burst()
1765 struct stv0900_internal *intp = state->internal; in stv0900_recv_slave_reply() local
1771 while ((stv0900_get_bits(intp, RX_END) != 1) && (i < 10)) { in stv0900_recv_slave_reply()
1776 if (stv0900_get_bits(intp, RX_END)) { in stv0900_recv_slave_reply()
1777 reply->msg_len = stv0900_get_bits(intp, FIFO_BYTENBR); in stv0900_recv_slave_reply()
1780 reply->msg[i] = stv0900_read_reg(intp, DISRXDATA); in stv0900_recv_slave_reply()
1790 struct stv0900_internal *intp = state->internal; in stv0900_set_tone() local
1798 stv0900_write_bits(intp, DISTX_MODE, 0); in stv0900_set_tone()
1799 stv0900_write_bits(intp, DISEQC_RESET, 1); in stv0900_set_tone()
1801 stv0900_write_bits(intp, DISEQC_RESET, 0); in stv0900_set_tone()
1806 stv0900_write_bits(intp, DISTX_MODE, in stv0900_set_tone()
1809 stv0900_write_bits(intp, DISEQC_RESET, 1); in stv0900_set_tone()
1810 stv0900_write_bits(intp, DISEQC_RESET, 0); in stv0900_set_tone()
1855 struct stv0900_internal *intp = state->internal; in stv0900_get_frontend() local
1857 struct stv0900_signal_info p_result = intp->result[demod]; in stv0900_get_frontend()