Lines Matching refs:ispif
163 struct ispif_device *ispif = dev; in ispif_isr_8x96() local
164 struct camss *camss = ispif->camss; in ispif_isr_8x96()
167 value0 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_0(0)); in ispif_isr_8x96()
168 value1 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_1(0)); in ispif_isr_8x96()
169 value2 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(0)); in ispif_isr_8x96()
170 value3 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_0(1)); in ispif_isr_8x96()
171 value4 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_1(1)); in ispif_isr_8x96()
172 value5 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(1)); in ispif_isr_8x96()
174 writel_relaxed(value0, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_0(0)); in ispif_isr_8x96()
175 writel_relaxed(value1, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_1(0)); in ispif_isr_8x96()
176 writel_relaxed(value2, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(0)); in ispif_isr_8x96()
177 writel_relaxed(value3, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_0(1)); in ispif_isr_8x96()
178 writel_relaxed(value4, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_1(1)); in ispif_isr_8x96()
179 writel_relaxed(value5, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(1)); in ispif_isr_8x96()
181 writel(0x1, ispif->base + ISPIF_IRQ_GLOBAL_CLEAR_CMD); in ispif_isr_8x96()
184 complete(&ispif->reset_complete[0]); in ispif_isr_8x96()
187 complete(&ispif->reset_complete[1]); in ispif_isr_8x96()
231 struct ispif_device *ispif = dev; in ispif_isr_8x16() local
232 struct camss *camss = ispif->camss; in ispif_isr_8x16()
235 value0 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_0(0)); in ispif_isr_8x16()
236 value1 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_1(0)); in ispif_isr_8x16()
237 value2 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(0)); in ispif_isr_8x16()
239 writel_relaxed(value0, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_0(0)); in ispif_isr_8x16()
240 writel_relaxed(value1, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_1(0)); in ispif_isr_8x16()
241 writel_relaxed(value2, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(0)); in ispif_isr_8x16()
243 writel(0x1, ispif->base + ISPIF_IRQ_GLOBAL_CLEAR_CMD); in ispif_isr_8x16()
246 complete(&ispif->reset_complete[0]); in ispif_isr_8x16()
266 static int ispif_vfe_reset(struct ispif_device *ispif, u8 vfe_id) in ispif_vfe_reset() argument
268 struct camss *camss = ispif->camss; in ispif_vfe_reset()
279 reinit_completion(&ispif->reset_complete[vfe_id]); in ispif_vfe_reset()
300 writel_relaxed(val, ispif->base + ISPIF_RST_CMD_1); in ispif_vfe_reset()
302 writel_relaxed(val, ispif->base + ISPIF_RST_CMD_0); in ispif_vfe_reset()
304 time = wait_for_completion_timeout(&ispif->reset_complete[vfe_id], in ispif_vfe_reset()
321 static int ispif_reset(struct ispif_device *ispif, u8 vfe_id) in ispif_reset() argument
323 struct camss *camss = ispif->camss; in ispif_reset()
334 ret = camss_enable_clocks(ispif->nclocks_for_reset, in ispif_reset()
335 ispif->clock_for_reset, in ispif_reset()
340 ret = ispif_vfe_reset(ispif, vfe_id); in ispif_reset()
344 camss_disable_clocks(ispif->nclocks_for_reset, ispif->clock_for_reset); in ispif_reset()
362 struct ispif_device *ispif = line->ispif; in ispif_set_power() local
363 struct device *dev = ispif->camss->dev; in ispif_set_power()
366 mutex_lock(&ispif->power_lock); in ispif_set_power()
369 if (ispif->power_count) { in ispif_set_power()
371 ispif->power_count++; in ispif_set_power()
379 ret = camss_enable_clocks(ispif->nclocks, ispif->clock, dev); in ispif_set_power()
385 ret = ispif_reset(ispif, line->vfe_id); in ispif_set_power()
388 camss_disable_clocks(ispif->nclocks, ispif->clock); in ispif_set_power()
392 ispif->intf_cmd[line->vfe_id].cmd_0 = CMD_ALL_NO_CHANGE; in ispif_set_power()
393 ispif->intf_cmd[line->vfe_id].cmd_1 = CMD_ALL_NO_CHANGE; in ispif_set_power()
395 ispif->power_count++; in ispif_set_power()
397 if (ispif->power_count == 0) { in ispif_set_power()
400 } else if (ispif->power_count == 1) { in ispif_set_power()
401 camss_disable_clocks(ispif->nclocks, ispif->clock); in ispif_set_power()
405 ispif->power_count--; in ispif_set_power()
409 mutex_unlock(&ispif->power_lock); in ispif_set_power()
422 static void ispif_select_clk_mux(struct ispif_device *ispif, in ispif_select_clk_mux() argument
430 val = readl_relaxed(ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL); in ispif_select_clk_mux()
434 writel_relaxed(val, ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL); in ispif_select_clk_mux()
438 val = readl_relaxed(ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL); in ispif_select_clk_mux()
442 writel_relaxed(val, ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL); in ispif_select_clk_mux()
446 val = readl_relaxed(ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL); in ispif_select_clk_mux()
450 writel_relaxed(val, ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL); in ispif_select_clk_mux()
454 val = readl_relaxed(ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL); in ispif_select_clk_mux()
458 writel_relaxed(val, ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL); in ispif_select_clk_mux()
462 val = readl_relaxed(ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL); in ispif_select_clk_mux()
466 writel_relaxed(val, ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL); in ispif_select_clk_mux()
481 static int ispif_validate_intf_status(struct ispif_device *ispif, in ispif_validate_intf_status() argument
489 val = readl_relaxed(ispif->base + in ispif_validate_intf_status()
493 val = readl_relaxed(ispif->base + in ispif_validate_intf_status()
497 val = readl_relaxed(ispif->base + in ispif_validate_intf_status()
501 val = readl_relaxed(ispif->base + in ispif_validate_intf_status()
505 val = readl_relaxed(ispif->base + in ispif_validate_intf_status()
511 dev_err(ispif->camss->dev, "%s: ispif is busy: 0x%x\n", in ispif_validate_intf_status()
527 static int ispif_wait_for_stop(struct ispif_device *ispif, in ispif_wait_for_stop() argument
552 ret = readl_poll_timeout(ispif->base + addr, in ispif_wait_for_stop()
558 dev_err(ispif->camss->dev, "%s: ispif stop timeout\n", in ispif_wait_for_stop()
572 static void ispif_select_csid(struct ispif_device *ispif, enum ispif_intf intf, in ispif_select_csid() argument
577 val = readl_relaxed(ispif->base + ISPIF_VFE_m_INTF_INPUT_SEL(vfe)); in ispif_select_csid()
606 writel(val, ispif->base + ISPIF_VFE_m_INTF_INPUT_SEL(vfe)); in ispif_select_csid()
617 static void ispif_select_cid(struct ispif_device *ispif, enum ispif_intf intf, in ispif_select_cid() argument
642 val = readl_relaxed(ispif->base + addr); in ispif_select_cid()
648 writel(val, ispif->base + addr); in ispif_select_cid()
658 static void ispif_config_irq(struct ispif_device *ispif, enum ispif_intf intf, in ispif_config_irq() argument
665 val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe)); in ispif_config_irq()
669 writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe)); in ispif_config_irq()
671 ispif->base + ISPIF_VFE_m_IRQ_CLEAR_0(vfe)); in ispif_config_irq()
674 val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe)); in ispif_config_irq()
678 writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe)); in ispif_config_irq()
680 ispif->base + ISPIF_VFE_m_IRQ_CLEAR_0(vfe)); in ispif_config_irq()
683 val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe)); in ispif_config_irq()
687 writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe)); in ispif_config_irq()
689 ispif->base + ISPIF_VFE_m_IRQ_CLEAR_1(vfe)); in ispif_config_irq()
692 val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe)); in ispif_config_irq()
696 writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe)); in ispif_config_irq()
698 ispif->base + ISPIF_VFE_m_IRQ_CLEAR_1(vfe)); in ispif_config_irq()
701 val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_2(vfe)); in ispif_config_irq()
705 writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_2(vfe)); in ispif_config_irq()
707 ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(vfe)); in ispif_config_irq()
711 writel(0x1, ispif->base + ISPIF_IRQ_GLOBAL_CLEAR_CMD); in ispif_config_irq()
723 static void ispif_config_pack(struct ispif_device *ispif, u32 code, in ispif_config_pack() argument
760 writel_relaxed(val, ispif->base + addr); in ispif_config_pack()
771 static void ispif_set_intf_cmd(struct ispif_device *ispif, u8 cmd, in ispif_set_intf_cmd() argument
777 val = &ispif->intf_cmd[vfe].cmd_1; in ispif_set_intf_cmd()
781 writel_relaxed(*val, ispif->base + ISPIF_VFE_m_INTF_CMD_1(vfe)); in ispif_set_intf_cmd()
784 val = &ispif->intf_cmd[vfe].cmd_0; in ispif_set_intf_cmd()
788 writel_relaxed(*val, ispif->base + ISPIF_VFE_m_INTF_CMD_0(vfe)); in ispif_set_intf_cmd()
805 struct ispif_device *ispif = line->ispif; in ispif_set_stream() local
806 struct camss *camss = ispif->camss; in ispif_set_stream()
820 mutex_lock(&ispif->config_lock); in ispif_set_stream()
821 ispif_select_clk_mux(ispif, intf, csid, vfe, 1); in ispif_set_stream()
823 ret = ispif_validate_intf_status(ispif, intf, vfe); in ispif_set_stream()
825 mutex_unlock(&ispif->config_lock); in ispif_set_stream()
829 ispif_select_csid(ispif, intf, csid, vfe, 1); in ispif_set_stream()
830 ispif_select_cid(ispif, intf, cid, vfe, 1); in ispif_set_stream()
831 ispif_config_irq(ispif, intf, vfe, 1); in ispif_set_stream()
834 ispif_config_pack(ispif, in ispif_set_stream()
837 ispif_set_intf_cmd(ispif, CMD_ENABLE_FRAME_BOUNDARY, in ispif_set_stream()
840 mutex_lock(&ispif->config_lock); in ispif_set_stream()
841 ispif_set_intf_cmd(ispif, CMD_DISABLE_FRAME_BOUNDARY, in ispif_set_stream()
843 mutex_unlock(&ispif->config_lock); in ispif_set_stream()
845 ret = ispif_wait_for_stop(ispif, intf, vfe); in ispif_set_stream()
849 mutex_lock(&ispif->config_lock); in ispif_set_stream()
852 ispif_config_pack(ispif, in ispif_set_stream()
855 ispif_config_irq(ispif, intf, vfe, 0); in ispif_set_stream()
856 ispif_select_cid(ispif, intf, cid, vfe, 0); in ispif_set_stream()
857 ispif_select_csid(ispif, intf, csid, vfe, 0); in ispif_set_stream()
858 ispif_select_clk_mux(ispif, intf, csid, vfe, 0); in ispif_set_stream()
861 mutex_unlock(&ispif->config_lock); in ispif_set_stream()
1101 struct ispif_device *ispif = camss->ispif; in msm_ispif_subdev_init() local
1106 if (!camss->ispif) in msm_ispif_subdev_init()
1109 ispif->camss = camss; in msm_ispif_subdev_init()
1113 ispif->line_num = 2; in msm_ispif_subdev_init()
1116 ispif->line_num = 4; in msm_ispif_subdev_init()
1120 ispif->line = devm_kcalloc(dev, ispif->line_num, in msm_ispif_subdev_init()
1121 sizeof(*ispif->line), GFP_KERNEL); in msm_ispif_subdev_init()
1122 if (!ispif->line) in msm_ispif_subdev_init()
1125 for (i = 0; i < ispif->line_num; i++) { in msm_ispif_subdev_init()
1126 ispif->line[i].ispif = ispif; in msm_ispif_subdev_init()
1127 ispif->line[i].id = i; in msm_ispif_subdev_init()
1130 ispif->line[i].formats = ispif_formats_8x16; in msm_ispif_subdev_init()
1131 ispif->line[i].nformats = in msm_ispif_subdev_init()
1135 ispif->line[i].formats = ispif_formats_8x96; in msm_ispif_subdev_init()
1136 ispif->line[i].nformats = in msm_ispif_subdev_init()
1145 ispif->base = devm_platform_ioremap_resource_byname(pdev, res->reg[0]); in msm_ispif_subdev_init()
1146 if (IS_ERR(ispif->base)) in msm_ispif_subdev_init()
1147 return PTR_ERR(ispif->base); in msm_ispif_subdev_init()
1149 ispif->base_clk_mux = devm_platform_ioremap_resource_byname(pdev, res->reg[1]); in msm_ispif_subdev_init()
1150 if (IS_ERR(ispif->base_clk_mux)) in msm_ispif_subdev_init()
1151 return PTR_ERR(ispif->base_clk_mux); in msm_ispif_subdev_init()
1159 ispif->irq = ret; in msm_ispif_subdev_init()
1160 snprintf(ispif->irq_name, sizeof(ispif->irq_name), "%s_%s", in msm_ispif_subdev_init()
1163 ret = devm_request_irq(dev, ispif->irq, ispif_isr_8x16, in msm_ispif_subdev_init()
1164 IRQF_TRIGGER_RISING, ispif->irq_name, ispif); in msm_ispif_subdev_init()
1167 ret = devm_request_irq(dev, ispif->irq, ispif_isr_8x96, in msm_ispif_subdev_init()
1168 IRQF_TRIGGER_RISING, ispif->irq_name, ispif); in msm_ispif_subdev_init()
1179 ispif->nclocks = 0; in msm_ispif_subdev_init()
1180 while (res->clock[ispif->nclocks]) in msm_ispif_subdev_init()
1181 ispif->nclocks++; in msm_ispif_subdev_init()
1183 ispif->clock = devm_kcalloc(dev, in msm_ispif_subdev_init()
1184 ispif->nclocks, sizeof(*ispif->clock), in msm_ispif_subdev_init()
1186 if (!ispif->clock) in msm_ispif_subdev_init()
1189 for (i = 0; i < ispif->nclocks; i++) { in msm_ispif_subdev_init()
1190 struct camss_clock *clock = &ispif->clock[i]; in msm_ispif_subdev_init()
1200 ispif->nclocks_for_reset = 0; in msm_ispif_subdev_init()
1201 while (res->clock_for_reset[ispif->nclocks_for_reset]) in msm_ispif_subdev_init()
1202 ispif->nclocks_for_reset++; in msm_ispif_subdev_init()
1204 ispif->clock_for_reset = devm_kcalloc(dev, in msm_ispif_subdev_init()
1205 ispif->nclocks_for_reset, in msm_ispif_subdev_init()
1206 sizeof(*ispif->clock_for_reset), in msm_ispif_subdev_init()
1208 if (!ispif->clock_for_reset) in msm_ispif_subdev_init()
1211 for (i = 0; i < ispif->nclocks_for_reset; i++) { in msm_ispif_subdev_init()
1212 struct camss_clock *clock = &ispif->clock_for_reset[i]; in msm_ispif_subdev_init()
1222 mutex_init(&ispif->power_lock); in msm_ispif_subdev_init()
1223 ispif->power_count = 0; in msm_ispif_subdev_init()
1225 mutex_init(&ispif->config_lock); in msm_ispif_subdev_init()
1228 init_completion(&ispif->reset_complete[i]); in msm_ispif_subdev_init()
1369 int msm_ispif_register_entities(struct ispif_device *ispif, in msm_ispif_register_entities() argument
1376 if (!ispif) in msm_ispif_register_entities()
1379 camss = ispif->camss; in msm_ispif_register_entities()
1381 for (i = 0; i < ispif->line_num; i++) { in msm_ispif_register_entities()
1382 struct v4l2_subdev *sd = &ispif->line[i].subdev; in msm_ispif_register_entities()
1383 struct media_pad *pads = ispif->line[i].pads; in msm_ispif_register_entities()
1390 v4l2_set_subdevdata(sd, &ispif->line[i]); in msm_ispif_register_entities()
1424 struct v4l2_subdev *sd = &ispif->line[i].subdev; in msm_ispif_register_entities()
1437 void msm_ispif_unregister_entities(struct ispif_device *ispif) in msm_ispif_unregister_entities() argument
1441 if (!ispif) in msm_ispif_unregister_entities()
1444 mutex_destroy(&ispif->power_lock); in msm_ispif_unregister_entities()
1445 mutex_destroy(&ispif->config_lock); in msm_ispif_unregister_entities()
1447 for (i = 0; i < ispif->line_num; i++) { in msm_ispif_unregister_entities()
1448 struct v4l2_subdev *sd = &ispif->line[i].subdev; in msm_ispif_unregister_entities()