Lines Matching refs:ew32
615 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000e_update_rdt_wa()
632 ew32(TCTL, tctl & ~E1000_TCTL_EN); in e1000e_update_tdt_wa()
1106 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1112 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1784 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr_msi()
1864 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr()
1908 ew32(ICS, (icr & adapter->eiac_mask)); in e1000_msix_other()
1918 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK); in e1000_msix_other()
1935 ew32(ICS, tx_ring->ims_val); in e1000_intr_msix_tx()
1938 ew32(IMS, adapter->tx_ring->ims_val); in e1000_intr_msix_tx()
1990 ew32(RFCTL, rfctl); in e1000_configure_msix()
2026 ew32(IVAR, ivar); in e1000_configure_msix()
2031 ew32(CTRL_EXT, ctrl_ext); in e1000_configure_msix()
2226 ew32(IMC, ~0); in e1000_irq_disable()
2228 ew32(EIAC_82574, 0); in e1000_irq_disable()
2250 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); in e1000_irq_enable()
2251 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | in e1000_irq_enable()
2254 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER); in e1000_irq_enable()
2256 ew32(IMS, IMS_ENABLE_MASK); in e1000_irq_enable()
2279 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); in e1000e_get_hw_control()
2282 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); in e1000e_get_hw_control()
2305 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); in e1000e_release_hw_control()
2308 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); in e1000e_release_hw_control()
2631 ew32(ITR, new_itr); in e1000e_write_itr()
2695 ew32(IMS, adapter->rx_ring->ims_val); in e1000e_poll()
2772 ew32(RCTL, rctl); in e1000e_vlan_filter_disable()
2796 ew32(RCTL, rctl); in e1000e_vlan_filter_enable()
2812 ew32(CTRL, ctrl); in e1000e_vlan_strip_disable()
2827 ew32(CTRL, ctrl); in e1000e_vlan_strip_enable()
2901 ew32(MDEF(i), (E1000_MDEF_PORT_623 | in e1000_init_manageability_pt()
2913 ew32(MANC2H, manc2h); in e1000_init_manageability_pt()
2914 ew32(MANC, manc); in e1000_init_manageability_pt()
2933 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32))); in e1000_configure_tx()
2934 ew32(TDBAH(0), (tdba >> 32)); in e1000_configure_tx()
2935 ew32(TDLEN(0), tdlen); in e1000_configure_tx()
2936 ew32(TDH(0), 0); in e1000_configure_tx()
2937 ew32(TDT(0), 0); in e1000_configure_tx()
2948 ew32(TIDV, adapter->tx_int_delay); in e1000_configure_tx()
2950 ew32(TADV, adapter->tx_abs_int_delay); in e1000_configure_tx()
2967 ew32(TXDCTL(0), txdctl); in e1000_configure_tx()
2970 ew32(TXDCTL(1), er32(TXDCTL(0))); in e1000_configure_tx()
2985 ew32(TARC(0), tarc); in e1000_configure_tx()
2992 ew32(TARC(0), tarc); in e1000_configure_tx()
2995 ew32(TARC(1), tarc); in e1000_configure_tx()
3008 ew32(TCTL, tctl); in e1000_configure_tx()
3018 ew32(IOSFPC, reg_val); in e1000_configure_tx()
3027 ew32(TARC(0), reg_val); in e1000_configure_tx()
3123 ew32(RFCTL, rfctl); in e1000_setup_rctl()
3165 ew32(PSRCTL, psrctl); in e1000_setup_rctl()
3185 ew32(RCTL, rctl); in e1000_setup_rctl()
3222 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_configure_rx()
3235 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); in e1000_configure_rx()
3236 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); in e1000_configure_rx()
3240 ew32(RDTR, adapter->rx_int_delay); in e1000_configure_rx()
3243 ew32(RADV, adapter->rx_abs_int_delay); in e1000_configure_rx()
3250 ew32(IAM, 0xffffffff); in e1000_configure_rx()
3251 ew32(CTRL_EXT, ctrl_ext); in e1000_configure_rx()
3258 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32))); in e1000_configure_rx()
3259 ew32(RDBAH(0), (rdba >> 32)); in e1000_configure_rx()
3260 ew32(RDLEN(0), rdlen); in e1000_configure_rx()
3261 ew32(RDH(0), 0); in e1000_configure_rx()
3262 ew32(RDT(0), 0); in e1000_configure_rx()
3278 ew32(RXCSUM, rxcsum); in e1000_configure_rx()
3291 ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8)); in e1000_configure_rx()
3303 ew32(RCTL, rctl); in e1000_configure_rx()
3393 ew32(RAH(rar_entries), 0); in e1000e_write_uc_addr_list()
3394 ew32(RAL(rar_entries), 0); in e1000e_write_uc_addr_list()
3453 ew32(RCTL, rctl); in e1000e_set_rx_mode()
3470 ew32(RSSRK(i), rss_key[i]); in e1000e_setup_rss_hash()
3474 ew32(RETA(i), 0); in e1000e_setup_rss_hash()
3482 ew32(RXCSUM, rxcsum); in e1000e_setup_rss_hash()
3490 ew32(MRQC, mrqc); in e1000e_setup_rss_hash()
3515 ew32(FEXTNVM7, fextnvm7 | BIT(0)); in e1000e_get_base_timinca()
3707 ew32(TSYNCTXCTL, regval); in e1000e_config_hwtstamp()
3718 ew32(TSYNCRXCTL, regval); in e1000e_config_hwtstamp()
3732 ew32(RXMTRL, rxmtrl); in e1000e_config_hwtstamp()
3739 ew32(RXUDP, rxudp); in e1000e_config_hwtstamp()
3819 ew32(TCTL, tctl | E1000_TCTL_EN); in e1000_flush_tx_ring()
3832 ew32(TDT(0), tx_ring->next_to_use); in e1000_flush_tx_ring()
3848 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_flush_rx_ring()
3861 ew32(RXDCTL(0), rxdctl); in e1000_flush_rx_ring()
3863 ew32(RCTL, rctl | E1000_RCTL_EN); in e1000_flush_rx_ring()
3866 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_flush_rx_ring()
3890 ew32(FEXTNVM11, fext_nvm11); in e1000_flush_desc_rings()
3932 ew32(TIMINCA, timinca); in e1000e_systim_reset()
3971 ew32(PBA, pba); in e1000e_reset()
4013 ew32(PBA, pba); in e1000e_reset()
4036 ew32(PBA, pba); in e1000e_reset()
4080 ew32(PBA, pba); in e1000e_reset()
4125 ew32(WUC, 0); in e1000e_reset()
4133 ew32(VET, ETH_P_8021Q); in e1000e_reset()
4195 ew32(FEXTNVM7, reg); in e1000e_reset()
4200 ew32(FEXTNVM9, reg); in e1000e_reset()
4216 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER); in e1000e_trigger_lsc()
4218 ew32(ICS, E1000_ICS_LSC); in e1000e_trigger_lsc()
4245 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000e_flush_descriptors()
4246 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); in e1000e_flush_descriptors()
4254 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000e_flush_descriptors()
4255 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); in e1000e_flush_descriptors()
4284 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000e_down()
4292 ew32(TCTL, tctl); in e1000e_down()
4549 ew32(ICS, E1000_ICS_RXSEQ); in e1000_test_msi_interrupt()
5150 ew32(RCTL, rctl | E1000_RCTL_EN); in e1000e_enable_receives()
5293 ew32(TARC(0), tarc0); in e1000_watchdog_task()
5301 ew32(TCTL, tctl); in e1000_watchdog_task()
5389 ew32(ICS, adapter->rx_ring->ims_val); in e1000_watchdog_task()
5391 ew32(ICS, E1000_ICS_RXDMT0); in e1000_watchdog_task()
6272 ew32(WUFC, wufc); in e1000_init_phy_wakeup()
6273 ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME | in e1000_init_phy_wakeup()
6326 ew32(H2ME, mac_data); in e1000e_s0ix_entry_flow()
6353 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6370 ew32(EXTCNF_CTRL, mac_data); in e1000e_s0ix_entry_flow()
6375 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_entry_flow()
6380 ew32(DPGFR, mac_data); in e1000e_s0ix_entry_flow()
6385 ew32(FEXTNVM12, mac_data); in e1000e_s0ix_entry_flow()
6390 ew32(FEXTNVM9, mac_data); in e1000e_s0ix_entry_flow()
6395 ew32(FEXTNVM6, mac_data); in e1000e_s0ix_entry_flow()
6400 ew32(FEXTNVM8, mac_data); in e1000e_s0ix_entry_flow()
6405 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6412 ew32(FEXTNVM5, mac_data); in e1000e_s0ix_entry_flow()
6419 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_entry_flow()
6424 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6432 ew32(TDFH, 0); in e1000e_s0ix_entry_flow()
6435 ew32(TDFT, 0); in e1000e_s0ix_entry_flow()
6438 ew32(TDFHS, 0); in e1000e_s0ix_entry_flow()
6441 ew32(TDFTS, 0); in e1000e_s0ix_entry_flow()
6444 ew32(TDFPC, 0); in e1000e_s0ix_entry_flow()
6447 ew32(RDFH, 0); in e1000e_s0ix_entry_flow()
6450 ew32(RDFT, 0); in e1000e_s0ix_entry_flow()
6453 ew32(RDFHS, 0); in e1000e_s0ix_entry_flow()
6456 ew32(RDFTS, 0); in e1000e_s0ix_entry_flow()
6459 ew32(RDFPC, 0); in e1000e_s0ix_entry_flow()
6475 ew32(FEXTNVM, mac_data); in e1000e_s0ix_exit_flow()
6480 ew32(H2ME, mac_data); in e1000e_s0ix_exit_flow()
6509 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_exit_flow()
6514 ew32(FEXTNVM8, mac_data); in e1000e_s0ix_exit_flow()
6519 ew32(FEXTNVM6, mac_data); in e1000e_s0ix_exit_flow()
6524 ew32(FEXTNVM9, mac_data); in e1000e_s0ix_exit_flow()
6531 ew32(FEXTNVM12, mac_data); in e1000e_s0ix_exit_flow()
6538 ew32(DPGFR, mac_data); in e1000e_s0ix_exit_flow()
6543 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6550 ew32(FEXTNVM5, mac_data); in e1000e_s0ix_exit_flow()
6576 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6582 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6588 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_exit_flow()
6652 ew32(RCTL, rctl); in __e1000_shutdown()
6659 ew32(CTRL, ctrl); in __e1000_shutdown()
6667 ew32(CTRL_EXT, ctrl_ext); in __e1000_shutdown()
6683 ew32(WUFC, wufc); in __e1000_shutdown()
6684 ew32(WUC, E1000_WUC_PME_EN); in __e1000_shutdown()
6687 ew32(WUC, 0); in __e1000_shutdown()
6688 ew32(WUFC, 0); in __e1000_shutdown()
6941 ew32(WUS, ~0); in __e1000_resume()
7194 ew32(WUS, ~0); in e1000_io_slot_reset()