Lines Matching refs:ret_val
21 s32 ret_val; in igc_reset_hw_base() local
27 ret_val = igc_disable_pcie_master(hw); in igc_reset_hw_base()
28 if (ret_val) in igc_reset_hw_base()
45 ret_val = igc_get_auto_rd_done(hw); in igc_reset_hw_base()
46 if (ret_val) { in igc_reset_hw_base()
58 return ret_val; in igc_reset_hw_base()
110 s32 ret_val = 0; in igc_setup_copper_link_base() local
118 ret_val = igc_setup_copper_link(hw); in igc_setup_copper_link_base()
120 return ret_val; in igc_setup_copper_link_base()
159 s32 ret_val = 0; in igc_init_phy_params_base() local
173 ret_val = hw->phy.ops.reset(hw); in igc_init_phy_params_base()
174 if (ret_val) { in igc_init_phy_params_base()
179 ret_val = igc_get_phy_id(hw); in igc_init_phy_params_base()
180 if (ret_val) in igc_init_phy_params_base()
181 return ret_val; in igc_init_phy_params_base()
186 return ret_val; in igc_init_phy_params_base()
192 s32 ret_val = 0; in igc_get_invariants_base() local
220 ret_val = igc_init_mac_params_base(hw); in igc_get_invariants_base()
221 if (ret_val) in igc_get_invariants_base()
225 ret_val = igc_init_nvm_params_base(hw); in igc_get_invariants_base()
228 ret_val = igc_init_nvm_params_i225(hw); in igc_get_invariants_base()
235 ret_val = igc_init_phy_params_base(hw); in igc_get_invariants_base()
236 if (ret_val) in igc_get_invariants_base()
240 return ret_val; in igc_get_invariants_base()
281 s32 ret_val = 0; in igc_init_hw_base() local
297 ret_val = igc_setup_link(hw); in igc_init_hw_base()
306 return ret_val; in igc_init_hw_base()