68 #define SMC_inw(a, r)							\  macro
124 #define SMC_inw(a, r)		inw((a) + (r) - 0xa0000000)  macro
144 #define SMC_inw(a, r)           readw((a) + (r))  macro
178 #define SMC_inw(a, r)		_swapw(readw((a) + (r)))  macro
199 #define SMC_inw(a, r)		ioread16((a) + (r))  macro
371 		*((u16 *)buf) = SMC_inw(ioaddr, reg);  in smc_pxa_dma_insw()
420 #define SMC_inw(ioaddr, reg)		SMC_inw_b(ioaddr, reg)  macro
862 				: (SMC_inw(ioaddr, PN_REG(lp)) & 0xFF))
876 				: (SMC_inw(ioaddr, PN_REG(lp)) >> 8))
880 				: (SMC_inw(ioaddr, TXFIFO_REG(lp)) & 0xFF))
884 				: (SMC_inw(ioaddr, TXFIFO_REG(lp)) >> 8))
888 				: (SMC_inw(ioaddr, INT_REG(lp)) & 0xFF))
898 			__mask = SMC_inw(ioaddr, INT_REG(lp)) & ~0xff; \
906 				: (SMC_inw(ioaddr, INT_REG(lp)) >> 8))
916 #define SMC_CURRENT_BANK(lp)	SMC_inw(ioaddr, BANK_SELECT)
926 #define SMC_GET_BASE(lp)		SMC_inw(ioaddr, BASE_REG(lp))
930 #define SMC_GET_CONFIG(lp)	SMC_inw(ioaddr, CONFIG_REG(lp))
934 #define SMC_GET_COUNTER(lp)	SMC_inw(ioaddr, COUNTER_REG(lp))
936 #define SMC_GET_CTL(lp)		SMC_inw(ioaddr, CTL_REG(lp))
940 #define SMC_GET_MII(lp)		SMC_inw(ioaddr, MII_REG(lp))
942 #define SMC_GET_GP(lp)		SMC_inw(ioaddr, GP_REG(lp))
954 #define SMC_GET_MIR(lp)		SMC_inw(ioaddr, MIR_REG(lp))
958 #define SMC_GET_MMU_CMD(lp)	SMC_inw(ioaddr, MMU_CMD_REG(lp))
962 #define SMC_GET_FIFO(lp)	SMC_inw(ioaddr, FIFO_REG(lp))
964 #define SMC_GET_PTR(lp)		SMC_inw(ioaddr, PTR_REG(lp))
974 #define SMC_GET_EPH_STATUS(lp)	SMC_inw(ioaddr, EPH_STATUS_REG(lp))
976 #define SMC_GET_RCR(lp)		SMC_inw(ioaddr, RCR_REG(lp))
980 #define SMC_GET_REV(lp)		SMC_inw(ioaddr, REV_REG(lp))
982 #define SMC_GET_RPC(lp)		SMC_inw(ioaddr, RPC_REG(lp))
992 #define SMC_GET_TCR(lp)		SMC_inw(ioaddr, TCR_REG(lp))
1000 		__v = SMC_inw(ioaddr, ADDR0_REG(lp));			\
1002 		__v = SMC_inw(ioaddr, ADDR1_REG(lp));			\
1004 		__v = SMC_inw(ioaddr, ADDR2_REG(lp));			\
1043 			(status) = SMC_inw(ioaddr, DATA_REG(lp));	\
1044 			(length) = SMC_inw(ioaddr, DATA_REG(lp));	\