101 	struct pci_dev *child;  in pci_function_0()  local
103 	list_for_each_entry(child, &linkbus->devices, bus_list)  in pci_function_0()
104 		if (PCI_FUNC(child->devfn) == 0)  in pci_function_0()
105 			return child;  in pci_function_0()
145 	struct pci_dev *child;  in pcie_set_clkpm_nocheck()  local
149 	list_for_each_entry(child, &linkbus->devices, bus_list)  in pcie_set_clkpm_nocheck()
150 		pcie_capability_clear_and_set_word(child, PCI_EXP_LNKCTL,  in pcie_set_clkpm_nocheck()
175 	struct pci_dev *child;  in pcie_clkpm_cap_init()  local
179 	list_for_each_entry(child, &linkbus->devices, bus_list) {  in pcie_clkpm_cap_init()
180 		pcie_capability_read_dword(child, PCI_EXP_LNKCAP, &reg32);  in pcie_clkpm_cap_init()
186 		pcie_capability_read_word(child, PCI_EXP_LNKCTL, &reg16);  in pcie_clkpm_cap_init()
254 	struct pci_dev *child, *parent = link->pdev;  in pcie_aspm_configure_common_clock()  local
260 	child = list_entry(linkbus->devices.next, struct pci_dev, bus_list);  in pcie_aspm_configure_common_clock()
261 	BUG_ON(!pci_is_pcie(child));  in pcie_aspm_configure_common_clock()
264 	pcie_capability_read_word(child, PCI_EXP_LNKSTA, &reg16);  in pcie_aspm_configure_common_clock()
279 		list_for_each_entry(child, &linkbus->devices, bus_list) {  in pcie_aspm_configure_common_clock()
280 			pcie_capability_read_word(child, PCI_EXP_LNKCTL,  in pcie_aspm_configure_common_clock()
294 	list_for_each_entry(child, &linkbus->devices, bus_list) {  in pcie_aspm_configure_common_clock()
295 		pcie_capability_read_word(child, PCI_EXP_LNKCTL, &reg16);  in pcie_aspm_configure_common_clock()
296 		child_old_ccc[PCI_FUNC(child->devfn)] = reg16 & PCI_EXP_LNKCTL_CCC;  in pcie_aspm_configure_common_clock()
297 		pcie_capability_clear_and_set_word(child, PCI_EXP_LNKCTL,  in pcie_aspm_configure_common_clock()
309 		list_for_each_entry(child, &linkbus->devices, bus_list)  in pcie_aspm_configure_common_clock()
310 			pcie_capability_clear_and_set_word(child, PCI_EXP_LNKCTL,  in pcie_aspm_configure_common_clock()
312 							   child_old_ccc[PCI_FUNC(child->devfn)]);  in pcie_aspm_configure_common_clock()
492 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in aspm_calc_l1ss_info()  local
514 	    calc_l1ss_pwron(child, scale2, val2)) {  in aspm_calc_l1ss_info()
519 		t_power_on = calc_l1ss_pwron(child, scale2, val2);  in aspm_calc_l1ss_info()
539 	pci_read_config_dword(child, child->l1ss + PCI_L1SS_CTL1, &cctl1);  in aspm_calc_l1ss_info()
540 	pci_read_config_dword(child, child->l1ss + PCI_L1SS_CTL2, &cctl2);  in aspm_calc_l1ss_info()
551 		pci_clear_and_set_dword(child, child->l1ss + PCI_L1SS_CTL1,  in aspm_calc_l1ss_info()
559 	pci_write_config_dword(child, child->l1ss + PCI_L1SS_CTL2, ctl2);  in aspm_calc_l1ss_info()
569 	pci_clear_and_set_dword(child, child->l1ss + PCI_L1SS_CTL1,  in aspm_calc_l1ss_info()
576 		pci_clear_and_set_dword(child, child->l1ss + PCI_L1SS_CTL1, 0,  in aspm_calc_l1ss_info()
583 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in aspm_l1ss_init()  local
587 	if (!parent->l1ss || !child->l1ss)  in aspm_l1ss_init()
593 	pci_read_config_dword(child, child->l1ss + PCI_L1SS_CAP,  in aspm_l1ss_init()
606 	if (!child->ltr_path)  in aspm_l1ss_init()
622 		pci_read_config_dword(child, child->l1ss + PCI_L1SS_CTL1,  in aspm_l1ss_init()
640 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in pcie_aspm_cap_init()  local
657 	pcie_capability_read_dword(child, PCI_EXP_LNKCAP, &child_lnkcap);  in pcie_aspm_cap_init()
671 	pcie_capability_read_dword(child, PCI_EXP_LNKCAP, &child_lnkcap);  in pcie_aspm_cap_init()
673 	pcie_capability_read_word(child, PCI_EXP_LNKCTL, &child_lnkctl);  in pcie_aspm_cap_init()
706 	list_for_each_entry(child, &linkbus->devices, bus_list) {  in pcie_aspm_cap_init()
707 		if (pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT &&  in pcie_aspm_cap_init()
708 		    pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END)  in pcie_aspm_cap_init()
711 		pcie_aspm_check_latency(child);  in pcie_aspm_cap_init()
719 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in pcie_config_aspm_l1ss()  local
737 	pci_clear_and_set_dword(child, child->l1ss + PCI_L1SS_CTL1,  in pcie_config_aspm_l1ss()
746 		pcie_capability_clear_and_set_word(child, PCI_EXP_LNKCTL,  in pcie_config_aspm_l1ss()
765 	pci_clear_and_set_dword(child, child->l1ss + PCI_L1SS_CTL1,  in pcie_config_aspm_l1ss()
778 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in pcie_config_aspm_link()  local
789 	if (parent->current_state != PCI_D0 || child->current_state != PCI_D0) {  in pcie_config_aspm_link()
818 	list_for_each_entry(child, &linkbus->devices, bus_list)  in pcie_config_aspm_link()
819 		pcie_config_aspm_dev(child, dwstream);  in pcie_config_aspm_link()
842 	struct pci_dev *child;  in pcie_aspm_sanity_check()  local
849 	list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {  in pcie_aspm_sanity_check()
850 		if (!pci_is_pcie(child))  in pcie_aspm_sanity_check()
866 		pcie_capability_read_dword(child, PCI_EXP_DEVCAP, &reg32);  in pcie_aspm_sanity_check()
868 …pci_info(child, "disabling ASPM on pre-1.1 PCIe device.  You can enable it with 'pcie_aspm=force'\…  in pcie_aspm_sanity_check()
918 	struct pci_dev *child;  in pcie_aspm_update_sysfs_visibility()  local
920 	list_for_each_entry(child, &pdev->subordinate->devices, bus_list)  in pcie_aspm_update_sysfs_visibility()
921 		sysfs_update_group(&child->dev.kobj, &aspm_ctrl_attr_group);  in pcie_aspm_update_sysfs_visibility()
1004 		struct pci_dev *child;  in pcie_update_aspm_capable()  local
1008 		list_for_each_entry(child, &linkbus->devices, bus_list) {  in pcie_update_aspm_capable()
1009 			if ((pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT) &&  in pcie_update_aspm_capable()
1010 			    (pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END))  in pcie_update_aspm_capable()
1012 			pcie_aspm_check_latency(child);  in pcie_update_aspm_capable()