25 void irq_gc_noop(struct irq_data *d)  in irq_gc_noop()  argument
37 void irq_gc_mask_disable_reg(struct irq_data *d)  in irq_gc_mask_disable_reg()  argument
39 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);  in irq_gc_mask_disable_reg()
40 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_mask_disable_reg()
41 	u32 mask = d->mask;  in irq_gc_mask_disable_reg()
57 void irq_gc_mask_set_bit(struct irq_data *d)  in irq_gc_mask_set_bit()  argument
59 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);  in irq_gc_mask_set_bit()
60 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_mask_set_bit()
61 	u32 mask = d->mask;  in irq_gc_mask_set_bit()
77 void irq_gc_mask_clr_bit(struct irq_data *d)  in irq_gc_mask_clr_bit()  argument
79 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);  in irq_gc_mask_clr_bit()
80 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_mask_clr_bit()
81 	u32 mask = d->mask;  in irq_gc_mask_clr_bit()
97 void irq_gc_unmask_enable_reg(struct irq_data *d)  in irq_gc_unmask_enable_reg()  argument
99 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);  in irq_gc_unmask_enable_reg()
100 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_unmask_enable_reg()
101 	u32 mask = d->mask;  in irq_gc_unmask_enable_reg()
114 void irq_gc_ack_set_bit(struct irq_data *d)  in irq_gc_ack_set_bit()  argument
116 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);  in irq_gc_ack_set_bit()
117 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_ack_set_bit()
118 	u32 mask = d->mask;  in irq_gc_ack_set_bit()
130 void irq_gc_ack_clr_bit(struct irq_data *d)  in irq_gc_ack_clr_bit()  argument
132 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);  in irq_gc_ack_clr_bit()
133 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_ack_clr_bit()
134 	u32 mask = ~d->mask;  in irq_gc_ack_clr_bit()
153 void irq_gc_mask_disable_and_ack_set(struct irq_data *d)  in irq_gc_mask_disable_and_ack_set()  argument
155 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);  in irq_gc_mask_disable_and_ack_set()
156 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_mask_disable_and_ack_set()
157 	u32 mask = d->mask;  in irq_gc_mask_disable_and_ack_set()
170 void irq_gc_eoi(struct irq_data *d)  in irq_gc_eoi()  argument
172 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);  in irq_gc_eoi()
173 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_eoi()
174 	u32 mask = d->mask;  in irq_gc_eoi()
190 int irq_gc_set_wake(struct irq_data *d, unsigned int on)  in irq_gc_set_wake()  argument
192 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);  in irq_gc_set_wake()
193 	u32 mask = d->mask;  in irq_gc_set_wake()
285 int __irq_alloc_domain_generic_chips(struct irq_domain *d, int irqs_per_chip,  in __irq_alloc_domain_generic_chips()  argument
300 	if (d->gc)  in __irq_alloc_domain_generic_chips()
303 	numchips = DIV_ROUND_UP(d->revmap_size, irqs_per_chip);  in __irq_alloc_domain_generic_chips()
320 	d->gc = dgc;  in __irq_alloc_domain_generic_chips()
330 		gc->domain = d;  in __irq_alloc_domain_generic_chips()
347 __irq_get_domain_generic_chip(struct irq_domain *d, unsigned int hw_irq)  in __irq_get_domain_generic_chip()  argument
349 	struct irq_domain_chip_generic *dgc = d->gc;  in __irq_get_domain_generic_chip()
366 irq_get_domain_generic_chip(struct irq_domain *d, unsigned int hw_irq)  in irq_get_domain_generic_chip()  argument
368 	struct irq_chip_generic *gc = __irq_get_domain_generic_chip(d, hw_irq);  in irq_get_domain_generic_chip()
384 int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,  in irq_map_generic_chip()  argument
387 	struct irq_data *data = irq_domain_get_irq_data(d, virq);  in irq_map_generic_chip()
388 	struct irq_domain_chip_generic *dgc = d->gc;  in irq_map_generic_chip()
395 	gc = __irq_get_domain_generic_chip(d, hw_irq);  in irq_map_generic_chip()
429 	irq_domain_set_info(d, virq, hw_irq, chip, gc, ct->handler, NULL, NULL);  in irq_map_generic_chip()
434 void irq_unmap_generic_chip(struct irq_domain *d, unsigned int virq)  in irq_unmap_generic_chip()  argument
436 	struct irq_data *data = irq_domain_get_irq_data(d, virq);  in irq_unmap_generic_chip()
437 	struct irq_domain_chip_generic *dgc = d->gc;  in irq_unmap_generic_chip()
442 	gc = irq_get_domain_generic_chip(d, hw_irq);  in irq_unmap_generic_chip()
449 	irq_domain_set_info(d, virq, hw_irq, &no_irq_chip, NULL, NULL, NULL,  in irq_unmap_generic_chip()
496 			struct irq_data *d = irq_get_irq_data(i);  in irq_setup_generic_chip()  local
499 				chip->irq_calc_mask(d);  in irq_setup_generic_chip()
501 				d->mask = 1 << (i - gc->irq_base);  in irq_setup_generic_chip()
518 int irq_setup_alt_chip(struct irq_data *d, unsigned int type)  in irq_setup_alt_chip()  argument
520 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);  in irq_setup_alt_chip()
526 			d->chip = &ct->chip;  in irq_setup_alt_chip()
527 			irq_data_to_desc(d)->handle_irq = ct->handler;  in irq_setup_alt_chip()